From 68f3db0599f0cbff2c0a4a88281afd54b01984fa Mon Sep 17 00:00:00 2001 From: Marco Massarelli Date: Fri, 6 Oct 2023 10:07:09 -0400 Subject: [PATCH] Add Freerouting rules file to improve autorouting --- freerouting/corney_island.rules | 92 +++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 freerouting/corney_island.rules diff --git a/freerouting/corney_island.rules b/freerouting/corney_island.rules new file mode 100644 index 0000000..29da8a3 --- /dev/null +++ b/freerouting/corney_island.rules @@ -0,0 +1,92 @@ + +(rules PCB corney_island + (snap_angle + fortyfive_degree + ) + (autoroute_settings + (fanout off) + (app.freerouting.autoroute on) + (postroute on) + (vias on) + (via_costs 50) + (plane_via_costs 5) + (start_ripup_costs 100) + (start_pass_no 18) + (layer_rule F.Cu + (active off) + (preferred_direction horizontal) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 2.5) + ) + (layer_rule B.Cu + (active on) + (preferred_direction vertical) + (preferred_direction_trace_costs 1.0) + (against_preferred_direction_trace_costs 1.7) + ) + ) + (rule + (width 250.0) + (clear 200.2) + (clear 125.0 (type smd_to_turn_gap)) + (clear 50.0 (type smd_smd)) + ) + (padstack "Via[0-1]_800:400_um" + (shape + (circle F.Cu 800.0 0.0 0.0) + ) + (shape + (circle B.Cu 800.0 0.0 0.0) + ) + (attach off) + ) + (via + "Via[0-1]_800:400_um" "Via[0-1]_800:400_um" default + ) + (via + "Via[0-1]_800:400_um-kicad_default" "Via[0-1]_800:400_um" "kicad_default" + ) + (via + "Via[0-1]_800:400_um-Power" "Via[0-1]_800:400_um" Power + ) + (via_rule + default "Via[0-1]_800:400_um" + ) + (via_rule + "kicad_default" "Via[0-1]_800:400_um-kicad_default" + ) + (via_rule + Power "Via[0-1]_800:400_um-Power" + ) + (class default + (clearance_class default) + (via_rule default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class "kicad_default" + (clearance_class "kicad_default") + (via_rule kicad_default) + (rule + (width 250.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) + (class Power + VCC GND RAW + (clearance_class Power) + (via_rule Power) + (rule + (width 500.0) + ) + (circuit + (use_layer F.Cu B.Cu) + ) + ) +) \ No newline at end of file