Merge branch 'master' of https://github.com/INTI-CMNB/KiBot

.github/workflows/pythonapp.yml

@@ -28,6 +28,7 @@ jobs:
     strategy:
       matrix:
         ki_release: [latest, ki6]
+        w_tests: [g1, g2, g3]
 
     runs-on: ubuntu-latest
     container: setsoft/kicad_auto_test:${{ matrix.ki_release }}
@@ -46,6 +47,9 @@ jobs:
       run: |
         rm -rf output
         rm -f tests/.local
+        # Unify coverage versions to allow combine
+        pip3 install --upgrade coverage==5.1
+        ln -s /usr/local/bin/coverage3 /usr/local/bin/python3-coverage || true
         # The KiCad 5 image currently has a very old pytest (no parallel run)
         pip3 install --upgrade pytest
         pip3 install --upgrade pytest-xdist
@@ -57,23 +61,29 @@ jobs:
         # pytest --log-cli-level debug -k "test_ibom_parse_fail" --test_dir=output
         # Run the 90% faster tests (under 3 s)
         # Do it in parallel
-        pytest -v --durations=0 -m "not slow" -n 2 --test_dir=output
-        # Run the slowest at the end and exit on the first error
-        pytest -v --durations=0 -m slow -x --test_dir=output
+        ./${{ matrix.w_tests }}.sh
+    - name: Store coverage
+      if: ${{ always() }}
+      uses: actions/upload-artifact@v3
+      with:
+        name: Test_Coverage_${{ matrix.ki_release }}_${{ matrix.w_tests }}
+        path: .coverage.*
+    - name: Collect coverage ${{ matrix.ki_release }}
+      run: |
         python3-coverage combine
         python3-coverage report
-        python3-coverage html -d output/htmlcov
+        python3-coverage html -d output/htmlcov_${{ matrix.w_tests }}
     - name: Store results
       if: ${{ always() }}
       uses: actions/upload-artifact@v3
       with:
-        name: Test_Output_${{ matrix.ki_release }}
+        name: Test_Output_${{ matrix.ki_release }}_${{ matrix.w_tests }}
         # Important! empty directories are skipped!!!!
         path: output
     - name: Upload Coverage
       env:
         COVERALLS_REPO_TOKEN: ${{ secrets.COVERALLS_REPO_TOKEN }}
-        COVERALLS_FLAG_NAME: ${{ matrix.ki_release }}
+        COVERALLS_FLAG_NAME: ${{ matrix.ki_release }}_${{ matrix.w_tests }}
         COVERALLS_PARALLEL: true
         GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
       run: |
@@ -84,6 +94,61 @@ jobs:
         #echo Disabled by now
         coveralls
 
+  consolidate_coverage:
+    name: Consolidate coverage data
+    runs-on: ubuntu-latest
+    container: setsoft/kicad_auto_test:ki6
+    needs: test
+
+    steps:
+    - uses: actions/checkout@v2
+      with:
+        submodules: recursive
+
+    - name: Download coverage k5 g1
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_latest_g1
+
+    - name: Download coverage k5 g2
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_latest_g2
+
+    - name: Download coverage k5 g3
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_latest_g3
+
+    - name: Download coverage k6 g1
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_ki6_g1
+
+    - name: Download coverage k6 g2
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_ki6_g2
+
+    - name: Download coverage k6 g3
+      uses: actions/download-artifact@v3
+      with:
+        name: Test_Coverage_ki6_g3
+
+    - name: Combine coverage
+      run: |
+        pip3 install --upgrade coverage==5.1
+        ln -s /usr/local/bin/coverage3 /usr/local/bin/python3-coverage || true
+        python3-coverage combine
+        python3-coverage report
+        python3-coverage html -d htmlcov
+
+    - name: Store result
+      uses: actions/upload-artifact@v3
+      with:
+        name: Test_Coverage_combined
+        path: htmlcov
+
 
   push_to_registry:
     name: Push Docker image to Docker Hub

CHANGELOG.md

@@ -14,6 +14,11 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
   - Now you can nest imports (import from an imported file) (#218)
   - Preflights can be imported (#181)
 
+### Fixed
+- OAR computation (Report) (#225)
+- Position: Problems when doing manual panelization (repeated references) (#224)
+- PCB_Print: Problems with filtered/modified PCBs
+
 
 ## [1.2.0] - 2022-06-15
 ### Added

README.md

@@ -3753,6 +3753,8 @@ Additionally we support:
 - `Footprint Y-Size`
 - `Footprint Populate`
 
+Important: These files doesn't support manual panelization with repeated reference names, you'll get the coordinates for just one component because this is a BoM.
+
 ## Credits
 
 - **KiBot project**: Salvador E. Tropea (@set-soft)

docs/README.in

@@ -1718,6 +1718,8 @@ Additionally we support:
 - `Footprint Y-Size`
 - `Footprint Populate`
 
+Important: These files doesn't support manual panelization with repeated reference names, you'll get the coordinates for just one component because this is a BoM.
+
 ## Credits
 
 - **KiBot project**: Salvador E. Tropea (@set-soft)

g1.sh

@@ -0,0 +1,3 @@
+#!/bin/sh
+# Fast tests
+pytest -v --durations=0 -m "not slow" -n 2 --test_dir=output

g2.sh

@@ -0,0 +1,5 @@
+#!/bin/sh
+# Eeschema tests
+pytest -v --durations=0 -m "eeschema" --test_dir=output
+# KiCad2Step tests and others
+pytest -v --durations=0 -m "slow and (not (pcbnew or eeschema))" --test_dir=output

g3.sh

@@ -0,0 +1,3 @@
+#!/bin/sh
+# PCBnew tests
+pytest -v --durations=0 -m "pcbnew" --test_dir=output

kibot/out_pcb_print.py

@@ -522,7 +522,7 @@ class PCB_PrintOptions(VariantOptions):
         if len(zones):
             ZONE_FILLER(GS.board).Fill(zones)
         # Add it to the list
-        filelist.append((GS.pcb_basename+"-"+suffix+".svg", self.pad_color))
+        filelist.append((pc.GetPlotFileName(), self.pad_color))
 
     def plot_vias(self, la, pc, p, filelist, via_t, via_c):
         id = la._id
@@ -602,7 +602,7 @@ class PCB_PrintOptions(VariantOptions):
         if len(zones):
             ZONE_FILLER(GS.board).Fill(zones)
         # Add it to the list
-        filelist.append((GS.pcb_basename+"-"+suffix+".svg", via_c))
+        filelist.append((pc.GetPlotFileName(), via_c))
 
     def add_frame_images(self, svg, monochrome):
         if (not self.plot_sheet_reference or not self.frame_plot_mechanism == 'internal' or
@@ -937,7 +937,7 @@ class PCB_PrintOptions(VariantOptions):
                 pc.OpenPlotfile(la.suffix, PLOT_FORMAT_SVG, p.sheet)
                 pc.PlotLayer()
                 pc.ClosePlot()
-                filelist.append((GS.pcb_basename+"-"+la.suffix+".svg", la.color))
+                filelist.append((pc.GetPlotFileName(), la.color))
                 self.plot_extra_cu(id, la, pc, p, filelist)
                 self.plot_realistic_solder_mask(id, temp_dir, filelist[-1][0], filelist[-1][1], p.mirror, p.scaling)
             # 2) Plot the frame using an empty layer and 1.0 scale

kibot/out_position.py

@@ -256,8 +256,10 @@ class PositionOptions(VariantOptions):
                     footprint = c.footprint
                     is_bottom = c.bottom
                     rotation = c.footprint_rot
-                    center_x = c.footprint_x
-                    center_y = c.footprint_y
+                    # Here we can't use c.footprint_x/y because this doesn't work for panels
+                    center = GS.get_center(m)
+                    center_x = center.x
+                    center_y = center.y
             if value is None:
                 value = m.GetValue()
                 footprint = str(m.GetFPID().GetLibItemName())  # pcbnew.UTF8 type

kibot/out_report.py

@@ -521,7 +521,7 @@ class ReportOptions(BaseOptions):
                 via_id = (via.GetDrill(), via.GetWidth())
                 self._vias[via_id] = self._vias.get(via_id, 0) + 1
                 d = adjust_drill(via_id[0])
-                self.oar_vias = min(self.oar_vias, via_id[1] - d)
+                self.oar_vias = min(self.oar_vias, (via_id[1] - d) / 2)
                 self._drills_real[d] = self._drills_real.get(d, 0) + 1
         self.track_min = min(self.track_d, self.track)
         ###########################################################
@@ -580,8 +580,8 @@ class ReportOptions(BaseOptions):
                     # print('{} @ {}'.format(dr, pad.GetPosition()))
                     self._drills_real[d_r] = self._drills_real.get(d_r, 0) + 1
                 pad_sz = pad.GetSize()
-                oar_x = pad_sz.x - dr_x_real
-                oar_y = pad_sz.y - dr_y_real
+                oar_x = (pad_sz.x - dr_x_real) / 2
+                oar_y = (pad_sz.y - dr_y_real) / 2
                 oar_t = min(oar_x, oar_y)
                 if oar_t > 0:
                     self.oar_pads = min(self.oar_pads, oar_t)
@@ -636,7 +636,7 @@ class ReportOptions(BaseOptions):
             h = v.m_Drill
             if not d and not h:
                 continue  # KiCad 6
-            self.oar_vias_d = min(self.oar_vias_d, d - adjust_drill(h))
+            self.oar_vias_d = min(self.oar_vias_d, (d - adjust_drill(h)) / 2)
             self._vias_defined.add((h, d))
             self._via_sizes_sorted.append((h, d))
         ###########################################################

pytest.ini

@@ -3,3 +3,6 @@ python_files = tests/test_plot/test_*.py
 markers =
     webtest: mark a test as a webtest.
     slow: mark test as slow.
+    kicad2step: uses kicad2step tool
+    eeschema: uses eeschema tool
+    pcbnew: uses pcbnew tool

tests/reference/5_1_6/light_control-report.txt

@@ -38,11 +38,11 @@ Via: 0.51/0.25 mm (20/10 mils)
 - Micro via: no [0.2/0.1 mm (8/4 mils)]
 - Burried/blind via: no
 
-Outer Annular Ring: 0.16 mm (6 mils)
+Outer Annular Ring: 0.08 mm (3 mils)
 
-- By design rules: 0.16 mm (6 mils)
+- By design rules: 0.08 mm (3 mils)
 
-Eurocircuits class: 6C
+Eurocircuits class: 10C
 
 
 # General stats

tests/reference/5_1_6/light_control-report.txt_2

@@ -38,11 +38,11 @@ Via: 0.51/0.25 mm (20/10 mils)
 - Micro via: no [0.2/0.1 mm (8/4 mils)]
 - Burried/blind via: no
 
-Outer Annular Ring: 0.16 mm (6 mils)
+Outer Annular Ring: 0.08 mm (3 mils)
 
-- By design rules: 0.16 mm (6 mils)
+- By design rules: 0.08 mm (3 mils)
 
-Eurocircuits class: 6C
+Eurocircuits class: 10C
 
 
 # General stats

tests/reference/5_1_6/light_control-report_simple.txt

@@ -3,7 +3,7 @@ Size:
 
 - 59.69x48.26 mm
 
-Class: 6C
+Class: 10C
 
 Track width: ≥ 0.15 mm
 
@@ -13,7 +13,7 @@ Minimum drill size: ≥ 0.35 mm (finished metalized hole: 0.25 mm)
 
 Minimum slot width: ≥ 0.6 mm
 
-Ring collar: ≥ 0.16 mm
+Ring collar: ≥ 0.08 mm
 
 
 Materials:

tests/reference/6_0_4/light_control-report.txt

@@ -63,11 +63,11 @@ Via: 0.51/0.25 mm (20/10 mils)
 - Micro via: no [0.2/0.1 mm (8/4 mils)]
 - Burried/blind via: no
 
-Outer Annular Ring: 0.16 mm (6 mils)
+Outer Annular Ring: 0.08 mm (3 mils)
 
-- By design rules: 0.16 mm (6 mils)
+- By design rules: 0.08 mm (3 mils)
 
-Eurocircuits class: 6C
+Eurocircuits class: 10C
 
 
 # General stats

tests/reference/6_0_4/light_control-report_simple.txt

@@ -3,7 +3,7 @@ Size:
 
 - 59.69x48.26 mm
 
-Class: 6C
+Class: 10C
 
 Track width: ≥ 0.15 mm
 
@@ -13,7 +13,7 @@ Minimum drill size: ≥ 0.35 mm (finished metalized hole: 0.25 mm)
 
 Minimum slot width: ≥ 0.6 mm
 
-Ring collar: ≥ 0.16 mm
+Ring collar: ≥ 0.08 mm
 
 Special features:
 

tests/test_plot/test_misc.py

@@ -744,6 +744,7 @@ def check_makefile(ctx, mkfile, prj, dbg, txt):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_makefile_1(test_dir):
     prj = 'test_v5'
     ctx = context.TestContext(test_dir, prj, 'makefile_1')
@@ -755,6 +756,7 @@ def test_makefile_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_makefile_2(test_dir):
     prj = 'test_v5'
     ctx = context.TestContext(test_dir, prj, 'makefile_1')
@@ -939,6 +941,7 @@ def test_cli_order(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_qr_lib_1(test_dir):
     prj = 'qr_test/qr_test'
     ctx = context.TestContext(test_dir, prj, 'qr_lib_1', POS_DIR)
@@ -1001,6 +1004,7 @@ def test_report_simple_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_report_simple_2(test_dir):
     prj = 'light_control'
     ctx = context.TestContext(test_dir, prj, 'report_simple_2', POS_DIR)
@@ -1160,6 +1164,7 @@ def test_annotate_pcb_tbrl_small_grid(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_gencad_1(test_dir):
     prj = 'gencad'
     ctx = context.TestContext(test_dir, prj, 'gencad_1')
@@ -1177,6 +1182,7 @@ def test_gencad_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_quick_start_1(test_dir):
     """ Very naive test to see if it doesn't crash """
     prj = 'light_control'
@@ -1217,6 +1223,7 @@ def test_quick_start_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_netlist_classic_1(test_dir):
     prj = 'light_control'
     dir_o = 'Export'
@@ -1226,6 +1233,7 @@ def test_netlist_classic_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_netlist_ipc_1(test_dir):
     prj = 'light_control'
     dir_o = 'Export'

tests/test_plot/test_preflight.py

@@ -24,6 +24,7 @@ from kibot.misc import DRC_ERROR, ERC_ERROR, BOM_ERROR, CORRUPTED_PCB, CORRUPTED
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_erc_1(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'erc', '')
@@ -34,6 +35,7 @@ def test_erc_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_erc_fail_1(test_dir):
     """ Using an SCH with ERC errors """
     prj = 'fail-erc'
@@ -53,6 +55,7 @@ def test_erc_fail_2(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_erc_warning_1(test_dir):
     """ Using an SCH with ERC warnings """
     prj = 'warning-project'
@@ -65,6 +68,7 @@ def test_erc_warning_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_erc_warning_2(test_dir):
     """ Using an SCH with ERC warnings as errors """
     prj = 'warning-project'
@@ -136,6 +140,7 @@ def test_drc_time_out(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_update_xml_1(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'update_xml', '')
@@ -156,6 +161,7 @@ def test_update_xml_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_update_xml_fail(test_dir):
     """ Using a dummy SCH """
     prj = '3Rs'

tests/test_plot/test_print_pcb.py

@@ -18,6 +18,7 @@ PDF_FILE_C = 'PCB_Bot_def.pdf'
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_simple(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'print_pcb', PDF_DIR)
@@ -28,6 +29,7 @@ def test_print_pcb_simple(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_svg_simple_1(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'print_pcb_svg')
@@ -40,6 +42,7 @@ def test_print_pcb_svg_simple_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_svg_simple_2(test_dir):
     """ Check the portrait version is OK """
     prj = 'bom_portrait'
@@ -53,6 +56,7 @@ def test_print_pcb_svg_simple_2(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_refill_1(test_dir):
     prj = 'zone-refill'
     ctx = context.TestContext(test_dir, prj, 'print_pcb_zone-refill')
@@ -63,6 +67,7 @@ def test_print_pcb_refill_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_refill_2(test_dir):
     """ Using KiCad 6 colors """
     if context.ki5():
@@ -76,6 +81,7 @@ def test_print_pcb_refill_2(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_variant_1(test_dir):
     prj = 'kibom-variant_3_txt'
     ctx = context.TestContext(test_dir, prj, 'print_pcb_variant_1')
@@ -89,6 +95,7 @@ def test_print_variant_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_pcb_options(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'print_pcb_options', PDF_DIR)
@@ -100,6 +107,7 @@ def test_print_pcb_options(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_print_wrong_paste(test_dir):
     prj = 'wrong_paste'
     ctx = context.TestContext(test_dir, prj, 'wrong_paste', PDF_DIR)
@@ -111,6 +119,7 @@ def test_print_wrong_paste(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_pcb_print_simple_1(test_dir):
     prj = 'light_control'
     ctx = context.TestContext(test_dir, prj, 'pcb_print_2')

tests/test_plot/test_print_sch.py

@@ -27,6 +27,7 @@ cov = coverage.Coverage()
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_ok(test_dir):
     prj = 'bom_no_xml'  # bom has meta data, here we test no meta-data
     ctx = context.TestContext(test_dir, prj, 'print_sch')
@@ -37,6 +38,7 @@ def test_print_sch_ok(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_fail(test_dir):
     prj = 'print_err'
     ctx = context.TestContextSCH(test_dir, prj, 'print_sch')
@@ -46,6 +48,7 @@ def test_print_sch_fail(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_svg_ok(test_dir):
     prj = 'bom_no_xml'  # bom has meta data, here we test no meta-data
     ctx = context.TestContext(test_dir, prj, 'print_sch_svg')
@@ -56,6 +59,7 @@ def test_print_sch_svg_ok(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_svg_fail(test_dir):
     prj = 'print_err'
     ctx = context.TestContext(test_dir, prj, 'print_sch_svg')
@@ -103,6 +107,7 @@ def test_sch_variant_ni_2(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_variant_ni_1(test_dir):
     """ Using a variant """
     prj = 'test_v5_wks'  # Is the most complete, contains every KiCad object I know
@@ -116,6 +121,7 @@ def test_print_sch_variant_ni_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_svg_variant_ni_1(test_dir):
     """ SVG using a variant """
     prj = 'test_v5'  # Is the most complete, contains every KiCad object I know
@@ -129,6 +135,7 @@ def test_print_sch_svg_variant_ni_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.eeschema
 def test_print_sch_variant_ni_2(test_dir):
     """ Using a filter """
     prj = 'test_v5'  # Is the most complete, contains every KiCad object I know

tests/test_plot/test_step.py

@@ -19,6 +19,7 @@ STEP_DIR = '3D'
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_step_1(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'step_simple', STEP_DIR)
@@ -34,6 +35,7 @@ def test_step_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_step_2(test_dir):
     prj = 'bom_fake_models'
     yaml = 'step_simple_2'
@@ -48,6 +50,7 @@ def test_step_2(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_step_3(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'step_simple_3', STEP_DIR)
@@ -58,6 +61,7 @@ def test_step_3(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_step_gl_env(test_dir):
     prj = 'bom'
     ctx = context.TestContext(test_dir, prj, 'step_gl_env', STEP_DIR)
@@ -73,6 +77,7 @@ def test_step_gl_env(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.kicad2step
 def test_step_variant_1(test_dir):
     prj = 'kibom-variant_3'
     ctx = context.TestContext(test_dir, prj, 'step_variant_1')
@@ -85,6 +90,7 @@ def test_step_variant_1(test_dir):
 
 
 @pytest.mark.slow
+@pytest.mark.pcbnew
 def test_render_3d_variant_1(test_dir):
     # Text variables to ensure they are rendered.
     # Traces

tests/yaml_samples/qr_lib_1.kibot.yaml

@@ -16,15 +16,16 @@ outputs:
 
   - name: 'print_front'
     comment: "Print F.SilkS and F.Cu"
-    type: pdf_pcb_print
+    type: pcb_print
     options:
       output: PCB.pdf
       plot_sheet_reference: false
-      monochrome: true
-      separated: true
-    layers:
-      - layer: F.SilkS
-      - layer: F.Cu
+      format: 'PDF'
+      pages:
+        - monochrome: true
+          layers: F.Cu
+        - monochrome: true
+          layers: F.SilkS
 
   - name: 'QRCodes'
     comment: "Example of QR codes"

tests/yaml_samples/sch_no_inductors_1.kibot.yaml

@@ -4,8 +4,10 @@ kibot:
 
 global:
   filters:
+    - number: 9
+      regex: 'EnvironmentVariables'
     - number: 10
-      regex: '3D'
+      regex: '(3D|templates)'
 
 filters:
   - name: 'no_inductor'