Getting there
This commit is contained in:
John Beard
parent
21e185c9d6
commit
5298dc2c72
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@ -2,10 +2,35 @@
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kiplot:
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version: 1
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options:
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basedir: /tmp/kiplot_out
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outputs:
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- 'gerbers':
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- name: 'gerbers'
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comment: "Gerbers for the board house"
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type: gerber
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dir: gerberdir
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options:
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subtract_mask_from_silk: true
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use_protel_extensions: false
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line_width: 0.15
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exclude_edge_layer: false
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exclude_pads_from_silkscreen: false
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use_aux_axis_as_origin: false
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layers:
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- F.Cu
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- F.SilkS
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- layer: F.Cu
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suffix: F_Cu
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- layer: F.SilkS
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suffix: F_SilkS
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# - layer: Inner.1
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# suffix: Inner_1
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- name: excellon_drill
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comment: "Excellon drill files"
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type: excellon
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dir: gerberdir
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options:
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metric_units: true
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pth_and_npth_single_file: true
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use_aux_axis_as_origin: false
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@ -2,22 +2,45 @@
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import argparse
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import logging
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import os
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import sys
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from . import kiplot
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from . import config_reader
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def main():
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parser = argparse.ArgumentParser(description='Command-line Plotting for KiCad')
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parser = argparse.ArgumentParser(
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description='Command-line Plotting for KiCad')
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parser.add_argument('-v', '--verbose', action='store_true',
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help='show debugging information')
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parser.add_argument('-b', '--board-file', required=True,
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help='The PCB .kicad-pcb board file')
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parser.add_argument('-c', '--plot-config', required=True,
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help='The plotting config file to use')
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args = parser.parse_args()
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log_level = logging.DEBUG if args.verbose else logging.INFO
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logging.basicConfig(level=log_level)
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if not os.path.isfile(args.board_file):
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logging.error("Board file not found: {}".format(args.board_file))
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if not os.path.isfile(args.plot_config):
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logging.error("Plot config file not found: {}"
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.format(args.plot_config))
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cr = config_reader.CfgYamlReader()
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with open(args.plot_config) as cf_file:
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cfg = cr.read(cf_file)
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plotter = kiplot.Plotter(cfg)
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plotter.plot(args.board_file)
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if __name__ == "__main__":
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main()
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@ -2,10 +2,220 @@
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Class to read KiPlot config files
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"""
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import logging
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import yaml
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import os
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import re
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import pcbnew
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from . import plot_config as PC
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class CfgReader(object):
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def __init__(self):
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pass
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pass
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class CfgYamlReader(CfgReader):
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class YamlError(Exception):
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pass
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def __init__(self):
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super(CfgYamlReader, self).__init__()
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def _check_version(self, data):
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try:
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version = data['kiplot']['version']
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except KeyError:
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raise self.YamlError("YAML config needs kiplot.version.")
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return None
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if version != 1:
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raise self.YamlError("Unknown KiPlot config version: {}"
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.format(version))
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return None
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return version
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def _get_required(self, data, key):
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try:
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val = data[key]
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except KeyError:
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raise self.YamlError("Value is needed for {}".format(key))
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return val
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def _parse_out_opts(self, otype, options):
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po = PC.OutputOptions(otype)
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# options that apply to the specific output type
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to = po.type_options
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# common options - layer outputs
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if otype in ['gerber']:
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to.line_width = self._get_required(options, 'line_width')
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to.exclude_edge_layer = self._get_required(
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options, 'exclude_edge_layer')
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to.exclude_pads_from_silkscreen = self._get_required(
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options, 'exclude_pads_from_silkscreen')
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to.use_aux_axis_as_origin = self._get_required(
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options, 'use_aux_axis_as_origin')
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# common options - drill outputs
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if otype in ['excellon']:
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to.use_aux_axis_as_origin = self._get_required(
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options, 'use_aux_axis_as_origin')
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# set type-specific options
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if otype == 'gerber':
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to.subtract_mask_from_silk = self._get_required(
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options, 'subtract_mask_from_silk')
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to.use_protel_extensions = self._get_required(
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options, 'use_protel_extensions')
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if otype == 'excellon':
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to.metric_units = self._get_required(
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options, 'metric_units')
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to.pth_and_npth_single_file = self._get_required(
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options, 'pth_and_npth_single_file')
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return po
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def _get_layer_from_str(self, s):
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"""
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Get the pcbnew layer from a string in the config
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"""
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D = {
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'F.Cu': pcbnew.F_Cu,
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'B.Cu': pcbnew.B_Cu,
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'F.Adhes': pcbnew.F_Adhes,
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'B.Adhes': pcbnew.B_Adhes,
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'F.Paste': pcbnew.F_Paste,
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'B.Paste': pcbnew.B_Paste,
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'F.SilkS': pcbnew.F_SilkS,
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'B.SilkS': pcbnew.B_SilkS,
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'F.Mask': pcbnew.F_Mask,
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'B.Mask': pcbnew.B_Mask,
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'Dwgs.User': pcbnew.Dwgs_User,
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'Cmts.User': pcbnew.Cmts_User,
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'Eco1.User': pcbnew.Eco1_User,
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'Eco2.User': pcbnew.Eco2_User,
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'Edge.Cuts': pcbnew.Edge_Cuts,
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'Margin': pcbnew.Margin,
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'F.CrtYd': pcbnew.F_CrtYd,
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'B.CrtYd': pcbnew.B_CrtYd,
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'F.Fab': pcbnew.F_Fab,
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'B.Fab': pcbnew.B_Fab,
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}
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layer = None
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if s in D:
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layer = PC.LayerInfo(D[s], False)
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elif s.startswith("Inner"):
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m = re.match(r"^Inner\.([0-9]+)$", s)
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if not m:
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raise self.YamlError("Malformed inner layer name: {}"
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.format(s))
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layer = PC.LayerInfo(int(m.group(1)), True)
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else:
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raise self.YamlError("Unknown layer name: {}".format(s))
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return layer
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def _parse_layer(self, l_obj):
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l_str = self._get_required(l_obj, 'layer')
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layer_id = self._get_layer_from_str(l_str)
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layer = PC.LayerConfig(layer_id)
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layer.desc = l_obj['description'] if 'description' in l_obj else None
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layer.suffix = l_obj['suffix'] if 'suffix' in l_obj else ""
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return layer
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def _parse_output(self, o_obj):
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try:
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name = o_obj['name']
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except KeyError:
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raise self.YamlError("Output needs a name")
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try:
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desc = o_obj['description']
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except KeyError:
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desc = None
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try:
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otype = o_obj['type']
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except KeyError:
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raise self.YamlError("Output needs a type")
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if otype not in ['gerber', 'excellon']:
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raise self.YamlError("Unknown output type: {}".format(otype))
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try:
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options = o_obj['options']
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except KeyError:
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raise self.YamlError("Output need to have options specified")
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outdir = self._get_required(o_obj, 'dir')
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output_opts = self._parse_out_opts(otype, options)
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o_cfg = PC.PlotOutput(name, desc, otype, output_opts)
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o_cfg.outdir = outdir
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try:
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layers = o_obj['layers']
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except KeyError:
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layers = []
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for l in layers:
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o_cfg.layers.append(self._parse_layer(l))
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return o_cfg
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def read(self, fstream):
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"""
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Read a file object into a config object
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:param fstream: file stream of a config YAML file
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"""
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try:
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data = yaml.load(fstream)
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except yaml.YAMLError as e:
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raise self.YamlError("Error loading YAML")
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return None
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self._check_version(data)
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try:
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outdir = data['options']['basedir']
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except KeyError:
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outdir = ""
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# relative to CWD (absolute path overrides)
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outdir = os.path.join(os.getcwd(), outdir)
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cfg = PC.PlotConfig()
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cfg.outdir = outdir
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for o in data['outputs']:
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op_cfg = self._parse_output(o)
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cfg.add_output(op_cfg)
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return cfg
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148
kiplot/kiplot.py
148
kiplot/kiplot.py
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@ -2,8 +2,152 @@
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Main Kiplot code
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"""
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import logging
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import os
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class KiPlot(object):
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from . import plot_config as PCfg
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try:
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import pcbnew
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except ImportError:
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logging.error("Failed to import pcbnew Python module."
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" Do you need to add it to PYTHONPATH?")
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raise
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class Plotter(object):
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"""
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Main Plotter class - this is what will perform the plotting
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"""
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def __init__(self, cfg):
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self.cfg = cfg
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def plot(self, brd_file):
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logging.debug("Starting plot of board {}".format(brd_file))
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board = pcbnew.LoadBoard(brd_file)
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logging.debug("Board loaded")
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for op in self.cfg.outputs:
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logging.debug("Processing output: {}".format(op.name))
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# fresh plot controller
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pc = pcbnew.PLOT_CONTROLLER(board)
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if self._output_is_layer(op):
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self._do_layer_plot(board, pc, op)
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elif self._output_is_drill(op):
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self._do_drill_plot(board, pc, op)
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else:
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raise ValueError("Don't know how to plot type {}"
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.format(op.options.type))
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pc.ClosePlot()
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def _output_is_layer(self, output):
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return output.options.type in [PCfg.OutputOptions.GERBER]
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def _output_is_drill(self, output):
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return output.options.type in [PCfg.OutputOptions.EXCELLON]
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def _get_plot_format(self, output):
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"""
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Gets the Pcbnew plot format for a given KiPlot output type
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"""
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if output.options.type == PCfg.OutputOptions.GERBER:
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return pcbnew.PLOT_FORMAT_GERBER
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raise ValueError("Don't know how to translate plot type: {}"
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.format(output.options.type))
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def _do_layer_plot(self, board, plot_ctrl, output):
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self._configure_plot_ctrl(plot_ctrl, output)
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layer_cnt = board.GetCopperLayerCount()
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# plot every layer in the output
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for l in output.layers:
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layer = l.layer
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suffix = l.suffix
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desc = l.desc
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# for inner layers, we can now check if the layer exists
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if layer.is_inner:
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if layer.layer < 1 or layer.layer >= layer_cnt - 1:
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raise ValueError(
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"Inner layer {} is not valid for this board"
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.format(layer.layer))
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# Set current layer
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plot_ctrl.SetLayer(layer.layer)
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# Plot single layer to file
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plot_format = self._get_plot_format(output)
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plot_ctrl.OpenPlotfile(suffix, plot_format, desc)
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logging.debug("Plotting layer {} to {}".format(
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layer.layer, plot_ctrl.GetPlotFileName()))
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plot_ctrl.PlotLayer()
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def _do_drill_plot(self, board, plot_ctrl, output):
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def __init__(self):
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pass
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def _configure_gerber_opts(self, po, output):
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# true if gerber
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po.SetUseGerberAttributes(True)
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assert(output.options.type == PCfg.OutputOptions.GERBER)
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gerb_opts = output.options.type_options
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po.SetSubtractMaskFromSilk(gerb_opts.subtract_mask_from_silk)
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po.SetUseGerberProtelExtensions(gerb_opts.use_protel_extensions)
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def _configure_plot_ctrl(self, plot_ctrl, output):
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logging.debug("Configuring plot controller for output")
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po = plot_ctrl.GetPlotOptions()
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opts = output.options.type_options
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# Set some important plot options:
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po.SetPlotFrameRef(False)
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# Line width for items without one defined
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po.SetLineWidth(opts.line_width)
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po.SetAutoScale(False) # do not change it
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po.SetScale(1) # do not change it
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po.SetMirror(False)
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po.SetExcludeEdgeLayer(opts.exclude_edge_layer)
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po.SetPlotPadsOnSilkLayer(not opts.exclude_pads_from_silkscreen)
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po.SetUseAuxOrigin(opts.use_aux_axis_as_origin)
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po.SetUseGerberAttributes(False)
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if output.options.type == PCfg.OutputOptions.GERBER:
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self._configure_gerber_opts(po, output)
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# Disable plot pad holes
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po.SetDrillMarksType(pcbnew.PCB_PLOT_PARAMS.NO_DRILL_SHAPE)
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# Skip plot pad NPTH when possible: when drill size and shape == pad size
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# and shape
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# usually sel to True for copper layers
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po.SetSkipPlotNPTH_Pads(False)
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# outdir is a combination of the config and output
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outdir = os.path.join(self.cfg.outdir, output.outdir)
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logging.debug("Output destination: {}".format(outdir))
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po.SetOutputDirectory(outdir)
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|
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@ -0,0 +1,108 @@
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import pcbnew
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class LayerOptions(object):
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"""
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Common options that all layer outputs have
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"""
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def __init__(self):
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self._line_width = None
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self.exclude_edge_layer = False
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self.exclude_pads_from_silkscreen = False
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@property
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def line_width(self):
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return self._line_width
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@line_width.setter
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def line_width(self, value):
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"""
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Set the line width, in mm
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"""
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self._line_width = pcbnew.FromMM(value)
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class GerberOptions(LayerOptions):
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def __init__(self):
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super(GerberOptions, self).__init__()
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self.subtract_mask_from_silk = False
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self.use_protel_extensions = False
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class DrillOptions(object):
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def __init__(self):
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pass
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class ExcellonOptions(DrillOptions):
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def __init__(self):
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super(ExcellonOptions, self).__init__()
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self.metric_units = True
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class OutputOptions(object):
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GERBER = 'gerber'
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EXCELLON = 'excellon'
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def __init__(self, otype):
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self.type = otype
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if otype == self.GERBER:
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self.type_options = GerberOptions()
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elif otype == self.EXCELLON:
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self.type_options = ExcellonOptions()
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else:
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self.type_options = None
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class LayerInfo(object):
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def __init__(self, layer, is_inner):
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self.layer = layer
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self.is_inner = is_inner
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||||
class LayerConfig(object):
|
||||
|
||||
def __init__(self, layer):
|
||||
|
||||
# the Pcbnew layer
|
||||
self.layer = layer
|
||||
self.suffix = ""
|
||||
self.desc = "desc"
|
||||
|
||||
|
||||
class PlotOutput(object):
|
||||
|
||||
def __init__(self, name, description, otype, options):
|
||||
self.name = name
|
||||
self.description = description
|
||||
self.outdir = None
|
||||
self.options = options
|
||||
|
||||
self.layers = []
|
||||
|
||||
|
||||
class PlotConfig(object):
|
||||
|
||||
def __init__(self):
|
||||
|
||||
self._outputs = []
|
||||
self.outdir = None
|
||||
|
||||
def add_output(self, new_op):
|
||||
self._outputs.append(new_op)
|
||||
|
||||
@property
|
||||
def outputs(self):
|
||||
return self._outputs
|
||||
Loading…
Reference in New Issue