Added test for PCB paper size stuff
This commit is contained in:
Salvador E. Tropea
parent
40a0277a5d
commit
72a2c71ddb
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@ -0,0 +1,231 @@
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(kicad_pcb (version 20171130) (host pcbnew 5.1.5+dfsg1-2~bpo10+1)
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(general
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(thickness 1.6)
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(drawings 4)
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(tracks 7)
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(zones 0)
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(modules 3)
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(nets 4)
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)
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(page A4 portrait)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 148.4 80.2)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 GND)
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(net 2 "Net-(C1-Pad1)")
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(net 3 VCC)
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(net_class Default "Esta es la clase de red por defecto."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net GND)
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(add_net "Net-(C1-Pad1)")
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(add_net VCC)
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)
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(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5EBEA03F)
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(at 150.71 78.6 180)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags resistor)
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(path /5EBE8E9E)
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(attr smd)
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(fp_text reference R2 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 200 (at 0 1.65) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 1 GND))
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(pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 2 "Net-(C1-Pad1)"))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5EBEA02E)
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(at 146.3 81.55 180)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags resistor)
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(path /5EBE8A2E)
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(attr smd)
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(fp_text reference R1 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 100 (at 0 1.65) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 2 "Net-(C1-Pad1)"))
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(pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 3 VCC))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metrico.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5EBEA01D)
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(at 146.3 78.6)
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(descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags capacitor)
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(path /5EBE91AC)
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(attr smd)
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(fp_text reference C1 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 1uF (at 0 1.65) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 1 GND))
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(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 2 "Net-(C1-Pad1)"))
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(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(gr_line (start 153 84) (end 153 76) (layer Edge.Cuts) (width 0.05) (tstamp 5EBEA29B))
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(gr_line (start 144 84) (end 153 84) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 144 76) (end 144 84) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 153 76) (end 144 76) (layer Edge.Cuts) (width 0.05))
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(segment (start 147.2375 78.6) (end 149.7725 78.6) (width 0.25) (layer F.Cu) (net 1))
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(segment (start 145.3625 79.3) (end 145.3625 81.55) (width 0.25) (layer F.Cu) (net 2))
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(segment (start 145.3625 78.6) (end 145.3625 79.3) (width 0.25) (layer F.Cu) (net 2))
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(segment (start 151.161973 78.114473) (end 151.6475 78.6) (width 0.25) (layer F.Cu) (net 2))
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(segment (start 150.62249 77.57499) (end 151.161973 78.114473) (width 0.25) (layer F.Cu) (net 2))
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(segment (start 146.38751 77.57499) (end 150.62249 77.57499) (width 0.25) (layer F.Cu) (net 2))
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(segment (start 145.3625 78.6) (end 146.38751 77.57499) (width 0.25) (layer F.Cu) (net 2))
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)
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@ -4,7 +4,7 @@
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(thickness 4.69)
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)
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(paper "A4")
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(paper "User" 431.8 279.4)
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(layers
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(0 "F.Cu" signal)
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(1 "In1.Cu" signal)
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@ -8,6 +8,7 @@ For debug information use:
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pytest-3 --log-cli-level debug
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"""
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import logging
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from . import context
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PDF_DIR = 'Layers'
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PDF_FILE = 'bom-F_Cu+F_SilkS.pdf'
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@ -105,9 +106,15 @@ def test_pcb_print_simple_2(test_dir):
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prj = 'pcb_print_rare'
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yaml = 'pcb_print_3'
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else:
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prj = 'bom'
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prj = 'bom_portrait'
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yaml = 'pcb_print_4'
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ctx = context.TestContext(test_dir, prj, yaml)
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ctx.run()
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ctx.expect_out_file(prj+'-assembly.pdf')
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file = ctx.expect_out_file(prj+'-assembly.pdf')
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w, h = ctx.get_pdf_size(file)
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logging.debug('PDF size {} x {} mm'.format(w, h))
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if context.ki6():
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assert abs(w-431.8) < 0.1 and abs(h-279.4) < 0.1
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else:
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assert abs(w-297.0) < 0.1 and abs(h-210.0) < 0.1
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ctx.clean_up()
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@ -548,6 +548,14 @@ class TestContext(object):
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with open(fname, 'w') as f:
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f.write(re.sub(pattern, repl, txt))
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def get_pdf_size(self, file):
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cmd = ['pdfinfo', file]
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logging.debug('Analyzing PDF size: '+usable_cmd(cmd))
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res = subprocess.run(cmd, stderr=subprocess.STDOUT, check=True, stdout=subprocess.PIPE).stdout.decode()
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m = re.search(r'Page size:\s+(\d+) x (\d+) pts', res)
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assert m is not None
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return int(m.group(1))/72.0*25.4, int(m.group(2))/72.0*25.4
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def expect_gerber_flash_at(self, file, res, pos):
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"""
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Check for a gerber flash at a given point
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