Salvador E. Tropea
parent
beee95ce31
commit
788b7d6b83
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@ -28,7 +28,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- XYRS support (you can generate position files using it)
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- CSV `hide_header` option
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- Generic filter: options to match if a field is/isn't defined.
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- Excellon drill: added `route_mode_for_oval_holes` option.
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- Drill:
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- Excellon: added `route_mode_for_oval_holes` option.
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- Support for blind/buried vias. (#166)
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- Default global `dir` option.
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- Default global `units` option.
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- Global option to specify `out_dir` (like -d command line option)
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@ -1,6 +1,6 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2022 Salvador E. Tropea
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# Copyright (c) 2020-2022 Instituto Nacional de Tecnología Industrial
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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import pcbnew
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@ -40,6 +40,8 @@ class Layer(Optionable):
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'F.Fab': pcbnew.F_Fab,
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'B.Fab': pcbnew.B_Fab,
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}
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# ID to default name table
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ID_2_DEFAULT_NAME = None
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# Default names
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DEFAULT_LAYER_DESC = {
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'F.Cu': 'Front copper',
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@ -270,8 +272,15 @@ class Layer(Optionable):
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return "{} ({} '{}' {})".format(self.layer, self._id, self.description, self.suffix)
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return "{} ('{}' {})".format(self.layer, self.description, self.suffix)
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@staticmethod
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def id2def_name(id):
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if GS.ki5():
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return Layer.ID_2_DEFAULT_NAME[id]
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return pcbnew.LayerName(id)
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for i in range(1, 30):
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name = 'In'+str(i)+'.Cu'
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Layer.DEFAULT_LAYER_NAMES[name] = pcbnew.In1_Cu+i-1
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Layer.DEFAULT_LAYER_DESC[name] = 'Inner layer '+str(i)
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Layer.ID_2_DEFAULT_NAME = {v: k for k, v in Layer.DEFAULT_LAYER_NAMES.items()}
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@ -1,13 +1,15 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2022 Salvador E. Tropea
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# Copyright (c) 2020-2022 Instituto Nacional de Tecnología Industrial
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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import os
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import re
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from pcbnew import (PLOT_FORMAT_HPGL, PLOT_FORMAT_POST, PLOT_FORMAT_GERBER, PLOT_FORMAT_DXF, PLOT_FORMAT_SVG,
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PLOT_FORMAT_PDF, wxPoint)
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from .optionable import (Optionable, BaseOptions)
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from .gs import GS
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from .layer import Layer
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from .macros import macros, document # noqa: F401
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from . import log
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@ -96,12 +98,43 @@ class AnyDrill(BaseOptions):
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# PTH
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return self.pth_id if self.pth_id is not None else d+'_drill'
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@staticmethod
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def _get_layer_name(id):
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""" Converts a layer ID into the magical name used by KiCad.
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This is somehow portable because we don't directly rely on the ID. """
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name = Layer.id2def_name(id)
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if name == 'F.Cu':
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return 'front'
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if name == 'B.Cu':
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return 'back'
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m = re.match(r'In(\d+)\.Cu', name)
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if not m:
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return None
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return 'in'+m.group(1)
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@staticmethod
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def _get_drill_groups(unified):
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""" Get the ID for all the generated files.
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It includes buried/blind vias. """
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groups = [''] if unified else ['PTH', 'NPTH']
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via_type = 'VIA' if GS.ki5() else 'PCB_VIA'
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pairs = set()
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for t in GS.board.GetTracks():
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tclass = t.GetClass()
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if tclass == via_type:
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via = t.Cast()
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l1 = AnyDrill._get_layer_name(via.TopLayer())
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l2 = AnyDrill._get_layer_name(via.BottomLayer())
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pairs.add(l1+'-'+l2)
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groups.extend(list(pairs))
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return groups
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def get_file_names(self, output_dir):
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""" Returns a dict containing KiCad names and its replacement.
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If no replacement is needed the replacement is empty """
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filenames = {}
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self._configure_writer(GS.board, wxPoint(0, 0))
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files = [''] if self._unified_output else ['PTH', 'NPTH']
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files = AnyDrill._get_drill_groups(self._unified_output)
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for d in files:
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kicad_id = '-'+d if d else d
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kibot_id = self.solve_id(d)
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@ -0,0 +1,235 @@
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(kicad_pcb (version 20171130) (host pcbnew 5.1.9+dfsg1-1~bpo10+1)
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(general
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(thickness 1.6)
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(drawings 4)
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(tracks 4)
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(zones 0)
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(modules 4)
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(nets 1)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(1 El1 signal)
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(2 In2.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.05)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.12)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0.051)
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(solder_mask_min_width 0.25)
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(aux_axis_origin 0 0)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes false)
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(usegerberadvancedattributes false)
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(creategerberjobfile false)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net_class Default "Esta es la clase de red por defecto."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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)
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(module MountingHole:MountingHole_2.1mm (layer F.Cu) (tedit 5B924765) (tstamp 5EBE1AA4)
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(at 120 29)
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(descr "Mounting Hole 2.1mm, no annular")
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(tags "mounting hole 2.1mm no annular")
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(attr virtual)
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(fp_text reference REF** (at 0 -3.2) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value MountingHole_2.1mm (at 0 3.2) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 2.1 0) (layer Cmts.User) (width 0.15))
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(fp_circle (center 0 0) (end 2.35 0) (layer F.CrtYd) (width 0.05))
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(fp_text user %R (at 0.3 0) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(pad "" np_thru_hole circle (at 0 0) (size 2.1 2.1) (drill 2.1) (layers *.Cu *.Mask))
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)
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(module Resistor_THT:R_Box_L13.0mm_W4.0mm_P9.00mm (layer F.Cu) (tedit 5AE5139B) (tstamp 5EA76EC0)
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(at 110 45)
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(descr "Resistor, Box series, Radial, pin pitch=9.00mm, 2W, length*width=13.0*4.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf")
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(tags "Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm")
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(fp_text reference R3 (at 4.5 -3.25) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value R_Box_L13.0mm_W4.0mm_P9.00mm (at 4.5 3.25) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -2 -2) (end -2 2) (layer F.Fab) (width 0.1))
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(fp_line (start -2 2) (end 11 2) (layer F.Fab) (width 0.1))
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(fp_line (start 11 2) (end 11 -2) (layer F.Fab) (width 0.1))
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(fp_line (start 11 -2) (end -2 -2) (layer F.Fab) (width 0.1))
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(fp_line (start -2.12 -2.12) (end 11.12 -2.12) (layer F.SilkS) (width 0.12))
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(fp_line (start -2.12 2.12) (end 11.12 2.12) (layer F.SilkS) (width 0.12))
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(fp_line (start -2.12 -2.12) (end -2.12 2.12) (layer F.SilkS) (width 0.12))
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(fp_line (start 11.12 -2.12) (end 11.12 2.12) (layer F.SilkS) (width 0.12))
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(fp_line (start -2.25 -2.25) (end -2.25 2.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start -2.25 2.25) (end 11.25 2.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 11.25 2.25) (end 11.25 -2.25) (layer F.CrtYd) (width 0.05))
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(fp_line (start 11.25 -2.25) (end -2.25 -2.25) (layer F.CrtYd) (width 0.05))
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(fp_text user 300 (at 4.5 0) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(pad 2 thru_hole circle (at 9 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
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(pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
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(model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Box_L13.0mm_W4.0mm_P9.00mm.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer B.Cu) (tedit 5B36C52B) (tstamp 5EA76DE9)
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(at 110 35 270)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags "resistor handsolder")
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(attr smd)
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(fp_text reference R2 (at 0 1.65 270) (layer B.SilkS)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_text value R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (at 0 -1.65 270) (layer B.Fab)
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(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
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)
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(fp_line (start -1 -0.6) (end -1 0.6) (layer B.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end 1 0.6) (layer B.Fab) (width 0.1))
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(fp_line (start 1 0.6) (end 1 -0.6) (layer B.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end -1 -0.6) (layer B.Fab) (width 0.1))
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(fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer B.SilkS) (width 0.12))
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(fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer B.SilkS) (width 0.12))
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(fp_line (start -1.85 -0.95) (end -1.85 0.95) (layer B.CrtYd) (width 0.05))
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(fp_line (start -1.85 0.95) (end 1.85 0.95) (layer B.CrtYd) (width 0.05))
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(fp_line (start 1.85 0.95) (end 1.85 -0.95) (layer B.CrtYd) (width 0.05))
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(fp_line (start 1.85 -0.95) (end -1.85 -0.95) (layer B.CrtYd) (width 0.05))
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(fp_text user 150 (at 0 0 270) (layer B.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
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)
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(pad 2 smd roundrect (at 1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391))
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(pad 1 smd roundrect (at -1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer F.Cu) (tedit 5B36C52B) (tstamp 5EA76D80)
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(at 105 35 90)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags "resistor handsolder")
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(attr smd)
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(fp_text reference R1 (at 0 -1.65 90) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (at 0 1.65 90) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05))
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(fp_text user 100 (at 0 0 90) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(pad 2 smd roundrect (at 1.025 0 90) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391))
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(pad 1 smd roundrect (at -1.025 0 90) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(gr_line (start 100 25) (end 100 50) (layer Edge.Cuts) (width 0.05) (tstamp 5EA7192F))
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(gr_line (start 100 50) (end 125 50) (layer Edge.Cuts) (width 0.05))
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(gr_line (start 125 25) (end 125 50) (layer Edge.Cuts) (width 0.05) (tstamp 5EA76EFC))
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(gr_line (start 100 25) (end 125 25) (layer Edge.Cuts) (width 0.05) (tstamp 5EA76F1D))
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(via blind (at 117.5 36.25) (size 0.8) (drill 0.4) (layers F.Cu In2.Cu) (net 0))
|
||||
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|
||||
(via blind (at 120.75 36.25) (size 0.8) (drill 0.4) (layers In1.Cu In2.Cu) (net 0))
|
||||
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|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,236 @@
|
|||
(kicad_pcb (version 20211014) (generator pcbnew)
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||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
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||||
)
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||||
|
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||||
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||||
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||||
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||||
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(layer "B.Paste" (type "Bottom Solder Paste"))
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||||
(layer "B.SilkS" (type "Bottom Silk Screen"))
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(copper_finish "None")
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
(plotreference true)
|
||||
(plotvalue true)
|
||||
(plotinvisibletext false)
|
||||
(sketchpadsonfab false)
|
||||
(subtractmaskfromsilk false)
|
||||
(outputformat 1)
|
||||
(mirror false)
|
||||
(drillshape 1)
|
||||
(scaleselection 1)
|
||||
(outputdirectory "")
|
||||
)
|
||||
)
|
||||
|
||||
(net 0 "")
|
||||
|
||||
(footprint "Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (layer "F.Cu")
|
||||
(tedit 5B36C52B) (tstamp 00000000-0000-0000-0000-00005ea76d80)
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||||
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|
||||
(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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||||
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
(at 110 45)
|
||||
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|
||||
(tags "Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm")
|
||||
(attr through_hole)
|
||||
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|
||||
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||||
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|
||||
)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
)
|
||||
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|
||||
|
||||
(footprint "MountingHole:MountingHole_2.1mm" (layer "F.Cu")
|
||||
(tedit 5B924765) (tstamp 00000000-0000-0000-0000-00005ebe1aa4)
|
||||
(at 120 29)
|
||||
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|
||||
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|
||||
(attr exclude_from_pos_files exclude_from_bom)
|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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|
||||
)
|
||||
|
||||
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|
||||
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|
||||
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|
||||
(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
|
||||
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|
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
(via blind (at 120.75 36.25) (size 0.8) (drill 0.4) (layers "In1.Cu" "In2.Cu") (net 0) (tstamp 922058ca-d09a-45fd-8394-05f3e2c1e03a))
|
||||
(via blind (at 119.25 34.5) (size 0.8) (drill 0.4) (layers "In2.Cu" "B.Cu") (net 0) (tstamp 0f54db53-a272-4955-88fb-d7ab00657bb0))
|
||||
|
||||
)
|
||||
|
|
@ -24,25 +24,37 @@ positions = {'R1': (105, 35, 'top'), 'R2': (110, 35, 'bottom'), 'R3': (110, 45,
|
|||
|
||||
|
||||
def do_3Rs(test_dir, conf, dir, modern, single=False):
|
||||
ctx = context.TestContext(test_dir, dir, '3Rs', conf, DRILL_DIR)
|
||||
ctx = context.TestContext(test_dir, dir, '3Rs_bv', conf, DRILL_DIR)
|
||||
ctx.run()
|
||||
# Check all outputs are there
|
||||
pth_drl = ctx.get_pth_drl_filename()
|
||||
npth_drl = ctx.get_npth_drl_filename()
|
||||
f1_drl = ctx.get_f1_drl_filename()
|
||||
i12_drl = ctx.get_12_drl_filename()
|
||||
pth_pdf_drl = ctx.get_pth_pdf_drl_filename()
|
||||
npth_pdf_drl = ctx.get_npth_pdf_drl_filename()
|
||||
f1_pdf_drl = ctx.get_f1_pdf_drl_filename()
|
||||
i12_pdf_drl = ctx.get_12_pdf_drl_filename()
|
||||
pth_gbr_drl = ctx.get_pth_gbr_drl_filename()
|
||||
npth_gbr_drl = ctx.get_npth_gbr_drl_filename()
|
||||
f1_gbr_drl = ctx.get_f1_gbr_drl_filename()
|
||||
i12_gbr_drl = ctx.get_12_gbr_drl_filename()
|
||||
report = 'report.rpt'
|
||||
|
||||
if modern:
|
||||
pth_drl = pth_drl.replace('PTH', 'PTH_drill')
|
||||
npth_drl = npth_drl.replace('PTH', 'PTH_drill')
|
||||
f1_drl = f1_drl.replace('front-in1', 'front-in1_drill')
|
||||
i12_drl = i12_drl.replace('in1-in2', 'in1-in2_drill')
|
||||
pth_gbr_drl = pth_gbr_drl.replace('-drl', '_drill')
|
||||
npth_gbr_drl = npth_gbr_drl.replace('-drl', '_drill')
|
||||
f1_gbr_drl = f1_gbr_drl.replace('-drl', '_drill')
|
||||
i12_gbr_drl = i12_gbr_drl.replace('-drl', '_drill')
|
||||
pth_pdf_drl = pth_pdf_drl.replace('-drl', '_drill')
|
||||
npth_pdf_drl = npth_pdf_drl.replace('-drl', '_drill')
|
||||
report = '3Rs-drill_report.txt'
|
||||
f1_pdf_drl = f1_pdf_drl.replace('-drl', '_drill')
|
||||
i12_pdf_drl = i12_pdf_drl.replace('-drl', '_drill')
|
||||
report = '3Rs_bv-drill_report.txt'
|
||||
if single:
|
||||
pth_drl = pth_drl.replace('PTH_', '')
|
||||
npth_drl = npth_drl.replace('NPTH_', '')
|
||||
|
|
@ -57,10 +69,16 @@ def do_3Rs(test_dir, conf, dir, modern, single=False):
|
|||
ctx.expect_out_file(os.path.join(DRILL_DIR, report))
|
||||
ctx.expect_out_file(pth_drl)
|
||||
ctx.expect_out_file(npth_drl)
|
||||
ctx.expect_out_file(f1_drl)
|
||||
ctx.expect_out_file(i12_drl)
|
||||
ctx.expect_out_file(pth_gbr_drl)
|
||||
ctx.expect_out_file(npth_gbr_drl)
|
||||
ctx.expect_out_file(f1_gbr_drl)
|
||||
ctx.expect_out_file(i12_gbr_drl)
|
||||
ctx.expect_out_file(pth_pdf_drl)
|
||||
ctx.expect_out_file(npth_pdf_drl)
|
||||
ctx.expect_out_file(f1_pdf_drl)
|
||||
ctx.expect_out_file(i12_pdf_drl)
|
||||
# We have R3 at (110, 45) length is 9 mm on X, drill 1 mm
|
||||
ctx.search_in_file(pth_drl, ['X110.0Y-45.0', 'X119.0Y-45.0'])
|
||||
ctx.expect_gerber_flash_at(pth_gbr_drl, 6, (110, -45))
|
||||
|
|
|
|||
|
|
@ -217,6 +217,24 @@ class TestContext(object):
|
|||
def get_pth_pdf_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-PTH-drl_map.pdf')
|
||||
|
||||
def get_f1_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-front-in1.drl')
|
||||
|
||||
def get_f1_gbr_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-front-in1-drl.gbr')
|
||||
|
||||
def get_f1_pdf_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-front-in1-drl_map.pdf')
|
||||
|
||||
def get_12_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-in1-in2.drl')
|
||||
|
||||
def get_12_gbr_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-in1-in2-drl.gbr')
|
||||
|
||||
def get_12_pdf_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-in1-in2-drl_map.pdf')
|
||||
|
||||
def get_npth_drl_filename(self):
|
||||
return os.path.join(self.sub_dir, self.board_name+'-NPTH.drl')
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue