Added support for buried/blind vias to the drill outputs

Fixes #166

CHANGELOG.md

@@ -28,7 +28,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
   - XYRS support (you can generate position files using it)
   - CSV `hide_header` option
 - Generic filter: options to match if a field is/isn't defined.
-- Excellon drill: added `route_mode_for_oval_holes` option.
+- Drill:
+  - Excellon: added `route_mode_for_oval_holes` option.
+  - Support for blind/buried vias. (#166)
 - Default global `dir` option.
 - Default global `units` option.
 - Global option to specify `out_dir` (like -d command line option)

kibot/layer.py

@@ -1,6 +1,6 @@
 # -*- coding: utf-8 -*-
-# Copyright (c) 2020-2021 Salvador E. Tropea
+# Copyright (c) 2020-2022 Salvador E. Tropea
-# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
+# Copyright (c) 2020-2022 Instituto Nacional de Tecnología Industrial
 # License: GPL-3.0
 # Project: KiBot (formerly KiPlot)
 import pcbnew
@@ -40,6 +40,8 @@ class Layer(Optionable):
         'F.Fab': pcbnew.F_Fab,
         'B.Fab': pcbnew.B_Fab,
     }
+    # ID to default name table
+    ID_2_DEFAULT_NAME = None
     # Default names
     DEFAULT_LAYER_DESC = {
         'F.Cu': 'Front copper',
@@ -270,8 +272,15 @@ class Layer(Optionable):
             return "{} ({} '{}' {})".format(self.layer, self._id, self.description, self.suffix)
         return "{} ('{}' {})".format(self.layer, self.description, self.suffix)
 
+    @staticmethod
+    def id2def_name(id):
+        if GS.ki5():
+            return Layer.ID_2_DEFAULT_NAME[id]
+        return pcbnew.LayerName(id)
+
 
 for i in range(1, 30):
     name = 'In'+str(i)+'.Cu'
     Layer.DEFAULT_LAYER_NAMES[name] = pcbnew.In1_Cu+i-1
     Layer.DEFAULT_LAYER_DESC[name] = 'Inner layer '+str(i)
+Layer.ID_2_DEFAULT_NAME = {v: k for k, v in Layer.DEFAULT_LAYER_NAMES.items()}

kibot/out_any_drill.py

@@ -1,13 +1,15 @@
 # -*- coding: utf-8 -*-
-# Copyright (c) 2020-2021 Salvador E. Tropea
+# Copyright (c) 2020-2022 Salvador E. Tropea
-# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
+# Copyright (c) 2020-2022 Instituto Nacional de Tecnología Industrial
 # License: GPL-3.0
 # Project: KiBot (formerly KiPlot)
 import os
+import re
 from pcbnew import (PLOT_FORMAT_HPGL, PLOT_FORMAT_POST, PLOT_FORMAT_GERBER, PLOT_FORMAT_DXF, PLOT_FORMAT_SVG,
                     PLOT_FORMAT_PDF, wxPoint)
 from .optionable import (Optionable, BaseOptions)
 from .gs import GS
+from .layer import Layer
 from .macros import macros, document  # noqa: F401
 from . import log
 
@@ -96,12 +98,43 @@ class AnyDrill(BaseOptions):
         # PTH
         return self.pth_id if self.pth_id is not None else d+'_drill'
 
+    @staticmethod
+    def _get_layer_name(id):
+        """ Converts a layer ID into the magical name used by KiCad.
+            This is somehow portable because we don't directly rely on the ID. """
+        name = Layer.id2def_name(id)
+        if name == 'F.Cu':
+            return 'front'
+        if name == 'B.Cu':
+            return 'back'
+        m = re.match(r'In(\d+)\.Cu', name)
+        if not m:
+            return None
+        return 'in'+m.group(1)
+
+    @staticmethod
+    def _get_drill_groups(unified):
+        """ Get the ID for all the generated files.
+            It includes buried/blind vias. """
+        groups = [''] if unified else ['PTH', 'NPTH']
+        via_type = 'VIA' if GS.ki5() else 'PCB_VIA'
+        pairs = set()
+        for t in GS.board.GetTracks():
+            tclass = t.GetClass()
+            if tclass == via_type:
+                via = t.Cast()
+                l1 = AnyDrill._get_layer_name(via.TopLayer())
+                l2 = AnyDrill._get_layer_name(via.BottomLayer())
+                pairs.add(l1+'-'+l2)
+        groups.extend(list(pairs))
+        return groups
+
     def get_file_names(self, output_dir):
         """ Returns a dict containing KiCad names and its replacement.
             If no replacement is needed the replacement is empty """
         filenames = {}
         self._configure_writer(GS.board, wxPoint(0, 0))
-        files = [''] if self._unified_output else ['PTH', 'NPTH']
+        files = AnyDrill._get_drill_groups(self._unified_output)
         for d in files:
             kicad_id = '-'+d if d else d
             kibot_id = self.solve_id(d)

tests/board_samples/kicad_5/3Rs_bv.kicad_pcb

@@ -0,0 +1,235 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.1.9+dfsg1-1~bpo10+1)
+
+  (general
+    (thickness 1.6)
+    (drawings 4)
+    (tracks 4)
+    (zones 0)
+    (modules 4)
+    (nets 1)
+  )
+
+  (page A4)
+  (layers
+    (0 F.Cu signal)
+    (1 El1 signal)
+    (2 In2.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.25)
+    (trace_clearance 0.2)
+    (zone_clearance 0.508)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.8)
+    (via_drill 0.4)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory ""))
+  )
+
+  (net 0 "")
+
+  (net_class Default "Esta es la clase de red por defecto."
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.8)
+    (via_drill 0.4)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+  )
+
+  (module MountingHole:MountingHole_2.1mm (layer F.Cu) (tedit 5B924765) (tstamp 5EBE1AA4)
+    (at 120 29)
+    (descr "Mounting Hole 2.1mm, no annular")
+    (tags "mounting hole 2.1mm no annular")
+    (attr virtual)
+    (fp_text reference REF** (at 0 -3.2) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value MountingHole_2.1mm (at 0 3.2) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_circle (center 0 0) (end 2.1 0) (layer Cmts.User) (width 0.15))
+    (fp_circle (center 0 0) (end 2.35 0) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0.3 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad "" np_thru_hole circle (at 0 0) (size 2.1 2.1) (drill 2.1) (layers *.Cu *.Mask))
+  )
+
+  (module Resistor_THT:R_Box_L13.0mm_W4.0mm_P9.00mm (layer F.Cu) (tedit 5AE5139B) (tstamp 5EA76EC0)
+    (at 110 45)
+    (descr "Resistor, Box series, Radial, pin pitch=9.00mm, 2W, length*width=13.0*4.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf")
+    (tags "Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm")
+    (fp_text reference R3 (at 4.5 -3.25) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value R_Box_L13.0mm_W4.0mm_P9.00mm (at 4.5 3.25) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -2 -2) (end -2 2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2 2) (end 11 2) (layer F.Fab) (width 0.1))
+    (fp_line (start 11 2) (end 11 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start 11 -2) (end -2 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.12 -2.12) (end 11.12 -2.12) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.12 2.12) (end 11.12 2.12) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.12 -2.12) (end -2.12 2.12) (layer F.SilkS) (width 0.12))
+    (fp_line (start 11.12 -2.12) (end 11.12 2.12) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.25 -2.25) (end -2.25 2.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.25 2.25) (end 11.25 2.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 11.25 2.25) (end 11.25 -2.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 11.25 -2.25) (end -2.25 -2.25) (layer F.CrtYd) (width 0.05))
+    (fp_text user 300 (at 4.5 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 2 thru_hole circle (at 9 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+    (pad 1 thru_hole circle (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask))
+    (model ${KISYS3DMOD}/Resistor_THT.3dshapes/R_Box_L13.0mm_W4.0mm_P9.00mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer B.Cu) (tedit 5B36C52B) (tstamp 5EA76DE9)
+    (at 110 35 270)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "resistor handsolder")
+    (attr smd)
+    (fp_text reference R2 (at 0 1.65 270) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_text value R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (at 0 -1.65 270) (layer B.Fab)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start -1 -0.6) (end -1 0.6) (layer B.Fab) (width 0.1))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer B.Fab) (width 0.1))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer B.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end -1 -0.6) (layer B.Fab) (width 0.1))
+    (fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer B.SilkS) (width 0.12))
+    (fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer B.SilkS) (width 0.12))
+    (fp_line (start -1.85 -0.95) (end -1.85 0.95) (layer B.CrtYd) (width 0.05))
+    (fp_line (start -1.85 0.95) (end 1.85 0.95) (layer B.CrtYd) (width 0.05))
+    (fp_line (start 1.85 0.95) (end 1.85 -0.95) (layer B.CrtYd) (width 0.05))
+    (fp_line (start 1.85 -0.95) (end -1.85 -0.95) (layer B.CrtYd) (width 0.05))
+    (fp_text user 150 (at 0 0 270) (layer B.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
+    )
+    (pad 2 smd roundrect (at 1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391))
+    (pad 1 smd roundrect (at -1.025 0 270) (size 1.15 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.217391))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer F.Cu) (tedit 5B36C52B) (tstamp 5EA76D80)
+    (at 105 35 90)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "resistor handsolder")
+    (attr smd)
+    (fp_text reference R1 (at 0 -1.65 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (at 0 1.65 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05))
+    (fp_text user 100 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+    )
+    (pad 2 smd roundrect (at 1.025 0 90) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391))
+    (pad 1 smd roundrect (at -1.025 0 90) (size 1.15 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 100 25) (end 100 50) (layer Edge.Cuts) (width 0.05) (tstamp 5EA7192F))
+  (gr_line (start 100 50) (end 125 50) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 125 25) (end 125 50) (layer Edge.Cuts) (width 0.05) (tstamp 5EA76EFC))
+  (gr_line (start 100 25) (end 125 25) (layer Edge.Cuts) (width 0.05) (tstamp 5EA76F1D))
+
+  (via blind (at 117.5 36.25) (size 0.8) (drill 0.4) (layers F.Cu In2.Cu) (net 0))
+  (via blind (at 119.25 37.75) (size 0.8) (drill 0.4) (layers F.Cu In1.Cu) (net 0))
+  (via blind (at 120.75 36.25) (size 0.8) (drill 0.4) (layers In1.Cu In2.Cu) (net 0))
+  (via blind (at 119.25 34.5) (size 0.8) (drill 0.4) (layers In2.Cu B.Cu) (net 0))
+
+)

tests/board_samples/kicad_6/3Rs_bv.kicad_pcb

@@ -0,0 +1,236 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "A4")
+  (layers
+    (0 "F.Cu" signal)
+    (1 "In1.Cu" signal "El1")
+    (2 "In2.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
+    (42 "Eco1.User" user "User.Eco1")
+    (43 "Eco2.User" user "User.Eco2")
+    (44 "Edge.Cuts" user)
+    (45 "Margin" user)
+    (46 "B.CrtYd" user "B.Courtyard")
+    (47 "F.CrtYd" user "F.Courtyard")
+    (48 "B.Fab" user)
+    (49 "F.Fab" user)
+  )
+
+  (setup
+    (stackup
+      (layer "F.SilkS" (type "Top Silk Screen"))
+      (layer "F.Paste" (type "Top Solder Paste"))
+      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
+      (layer "F.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 1" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "In1.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 2" (type "prepreg") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "In2.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 3" (type "core") (thickness 0.48) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "B.Cu" (type "copper") (thickness 0.035))
+      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
+      (layer "B.Paste" (type "Bottom Solder Paste"))
+      (layer "B.SilkS" (type "Bottom Silk Screen"))
+      (copper_finish "None")
+      (dielectric_constraints no)
+    )
+    (pad_to_mask_clearance 0.051)
+    (solder_mask_min_width 0.25)
+    (pcbplotparams
+      (layerselection 0x00010fc_ffffffff)
+      (disableapertmacros false)
+      (usegerberextensions false)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (svguseinch false)
+      (svgprecision 6)
+      (excludeedgelayer true)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (dxfpolygonmode true)
+      (dxfimperialunits true)
+      (dxfusepcbnewfont true)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (sketchpadsonfab false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory "")
+    )
+  )
+
+  (net 0 "")
+
+  (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (layer "F.Cu")
+    (tedit 5B36C52B) (tstamp 00000000-0000-0000-0000-00005ea76d80)
+    (at 105 35 90)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "resistor handsolder")
+    (attr smd)
+    (fp_text reference "R1" (at 0 -1.65 90) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 0b21a65d-d20b-411e-920a-75c343ac5136)
+    )
+    (fp_text value "R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (at 0 1.65 90) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 3cd1bda0-18db-417d-b581-a0c50623df68)
+    )
+    (fp_text user "100" (at 0 0 90) (layer "F.Fab")
+      (effects (font (size 0.5 0.5) (thickness 0.08)))
+      (tstamp 6c2e273e-743c-4f1e-a647-4171f8122550)
+    )
+    (fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer "F.SilkS") (width 0.12) (tstamp 4c8eb964-bdf4-44de-90e9-e2ab82dd5313))
+    (fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer "F.SilkS") (width 0.12) (tstamp 94a873dc-af67-4ef9-8159-1f7c93eeb3d7))
+    (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 2d210a96-f81f-42a9-8bf4-1b43c11086f3))
+    (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 9bb20359-0f8b-45bc-9d38-6626ed3a939d))
+    (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp aa14c3bd-4acc-4908-9d28-228585a22a9d))
+    (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp e857610b-4434-4144-b04e-43c1ebdc5ceb))
+    (fp_line (start -1 -0.6) (end 1 -0.6) (layer "F.Fab") (width 0.1) (tstamp 03c52831-5dc5-43c5-a442-8d23643b46fb))
+    (fp_line (start 1 0.6) (end -1 0.6) (layer "F.Fab") (width 0.1) (tstamp 29e78086-2175-405e-9ba3-c48766d2f50c))
+    (fp_line (start 1 -0.6) (end 1 0.6) (layer "F.Fab") (width 0.1) (tstamp a1823eb2-fb0d-4ed8-8b96-04184ac3a9d5))
+    (fp_line (start -1 0.6) (end -1 -0.6) (layer "F.Fab") (width 0.1) (tstamp d57dcfee-5058-4fc2-a68b-05f9a48f685b))
+    (pad "1" smd roundrect locked (at -1.025 0 90) (size 1.15 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391) (tstamp 7dc880bc-e7eb-4cce-8d8c-0b65a9dd788e))
+    (pad "2" smd roundrect locked (at 1.025 0 90) (size 1.15 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.217391) (tstamp 666713b0-70f4-42df-8761-f65bc212d03b))
+    (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "Resistor_THT:R_Box_L13.0mm_W4.0mm_P9.00mm" (layer "F.Cu")
+    (tedit 5AE5139B) (tstamp 00000000-0000-0000-0000-00005ea76ec0)
+    (at 110 45)
+    (descr "Resistor, Box series, Radial, pin pitch=9.00mm, 2W, length*width=13.0*4.0mm^2, http://www.produktinfo.conrad.com/datenblaetter/425000-449999/443860-da-01-de-METALLBAND_WIDERSTAND_0_1_OHM_5W_5Pr.pdf")
+    (tags "Resistor Box series Radial pin pitch 9.00mm 2W length 13.0mm width 4.0mm")
+    (attr through_hole)
+    (fp_text reference "R3" (at 4.5 -3.25) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 47baf4b1-0938-497d-88f9-671136aa8be7)
+    )
+    (fp_text value "R_Box_L13.0mm_W4.0mm_P9.00mm" (at 4.5 3.25) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 77ed3941-d133-4aef-a9af-5a39322d14eb)
+    )
+    (fp_text user "300" (at 4.5 0) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 87371631-aa02-498a-998a-09bdb74784c1)
+    )
+    (fp_line (start 11.12 -2.12) (end 11.12 2.12) (layer "F.SilkS") (width 0.12) (tstamp 3b838d52-596d-4e4d-a6ac-e4c8e7621137))
+    (fp_line (start -2.12 2.12) (end 11.12 2.12) (layer "F.SilkS") (width 0.12) (tstamp 66116376-6967-4178-9f23-a26cdeafc400))
+    (fp_line (start -2.12 -2.12) (end -2.12 2.12) (layer "F.SilkS") (width 0.12) (tstamp 749dfe75-c0d6-4872-9330-29c5bbcb8ff8))
+    (fp_line (start -2.12 -2.12) (end 11.12 -2.12) (layer "F.SilkS") (width 0.12) (tstamp eb667eea-300e-4ca7-8a6f-4b00de80cd45))
+    (fp_line (start -2.25 2.25) (end 11.25 2.25) (layer "F.CrtYd") (width 0.05) (tstamp 1e1b062d-fad0-427c-a622-c5b8a80b5268))
+    (fp_line (start 11.25 -2.25) (end -2.25 -2.25) (layer "F.CrtYd") (width 0.05) (tstamp 30f15357-ce1d-48b9-93dc-7d9b1b2aa048))
+    (fp_line (start -2.25 -2.25) (end -2.25 2.25) (layer "F.CrtYd") (width 0.05) (tstamp cbdcaa78-3bbc-413f-91bf-2709119373ce))
+    (fp_line (start 11.25 2.25) (end 11.25 -2.25) (layer "F.CrtYd") (width 0.05) (tstamp d8603679-3e7b-4337-8dbc-1827f5f54d8a))
+    (fp_line (start 11 -2) (end -2 -2) (layer "F.Fab") (width 0.1) (tstamp 44d8279a-9cd1-4db6-856f-0363131605fc))
+    (fp_line (start -2 2) (end 11 2) (layer "F.Fab") (width 0.1) (tstamp 4fb02e58-160a-4a39-9f22-d0c75e82ee72))
+    (fp_line (start -2 -2) (end -2 2) (layer "F.Fab") (width 0.1) (tstamp e615f7aa-337e-474d-9615-2ad82b1c44ca))
+    (fp_line (start 11 2) (end 11 -2) (layer "F.Fab") (width 0.1) (tstamp ef8fe2ac-6a7f-4682-9418-b801a1b10a3b))
+    (pad "1" thru_hole circle locked (at 0 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (tstamp 5038e144-5119-49db-b6cf-f7c345f1cf03))
+    (pad "2" thru_hole circle locked (at 9 0) (size 2 2) (drill 1) (layers *.Cu *.Mask) (tstamp 2e642b3e-a476-4c54-9a52-dcea955640cd))
+    (model "${KISYS3DMOD}/Resistor_THT.3dshapes/R_Box_L13.0mm_W4.0mm_P9.00mm.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (footprint "MountingHole:MountingHole_2.1mm" (layer "F.Cu")
+    (tedit 5B924765) (tstamp 00000000-0000-0000-0000-00005ebe1aa4)
+    (at 120 29)
+    (descr "Mounting Hole 2.1mm, no annular")
+    (tags "mounting hole 2.1mm no annular")
+    (attr exclude_from_pos_files exclude_from_bom)
+    (fp_text reference "REF**" (at 0 -3.2) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp bb7f0588-d4d8-44bf-9ebf-3c533fe4d6ae)
+    )
+    (fp_text value "MountingHole_2.1mm" (at 0 3.2) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp f1830a1b-f0cc-47ae-a2c9-679c82032f14)
+    )
+    (fp_text user "${REFERENCE}" (at 0.3 0) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp e10b5627-3247-4c86-b9f6-ef474ca11543)
+    )
+    (fp_circle (center 0 0) (end 2.1 0) (layer "Cmts.User") (width 0.15) (fill none) (tstamp 6a955fc7-39d9-4c75-9a69-676ca8c0b9b2))
+    (fp_circle (center 0 0) (end 2.35 0) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp e8314017-7be6-4011-9179-37449a29b311))
+    (pad "" np_thru_hole circle locked (at 0 0) (size 2.1 2.1) (drill 2.1) (layers *.Cu *.Mask) (tstamp 746ba970-8279-4e7b-aed3-f28687777c21))
+  )
+
+  (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (layer "B.Cu")
+    (tedit 5B36C52B) (tstamp 00000000-0000-0000-0000-00005ea76de9)
+    (at 110 35 -90)
+    (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+    (tags "resistor handsolder")
+    (attr smd)
+    (fp_text reference "R2" (at 0 1.65 -90) (layer "B.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+      (tstamp efeac2a2-7682-4dc7-83ee-f6f1b23da506)
+    )
+    (fp_text value "R_0805_2012Metric_Pad1.15x1.40mm_HandSolder" (at 0 -1.65 -90) (layer "B.Fab")
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+      (tstamp 5fc27c35-3e1c-4f96-817c-93b5570858a6)
+    )
+    (fp_text user "150" (at 0 0 -90) (layer "B.Fab")
+      (effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
+      (tstamp 0eaa98f0-9565-4637-ace3-42a5231b07f7)
+    )
+    (fp_line (start -0.261252 0.71) (end 0.261252 0.71) (layer "B.SilkS") (width 0.12) (tstamp 127679a9-3981-4934-815e-896a4e3ff56e))
+    (fp_line (start -0.261252 -0.71) (end 0.261252 -0.71) (layer "B.SilkS") (width 0.12) (tstamp 48ab88d7-7084-4d02-b109-3ad55a30bb11))
+    (fp_line (start 1.85 -0.95) (end -1.85 -0.95) (layer "B.CrtYd") (width 0.05) (tstamp 704d6d51-bb34-4cbf-83d8-841e208048d8))
+    (fp_line (start 1.85 0.95) (end 1.85 -0.95) (layer "B.CrtYd") (width 0.05) (tstamp 8174b4de-74b1-48db-ab8e-c8432251095b))
+    (fp_line (start -1.85 -0.95) (end -1.85 0.95) (layer "B.CrtYd") (width 0.05) (tstamp f71da641-16e6-4257-80c3-0b9d804fee4f))
+    (fp_line (start -1.85 0.95) (end 1.85 0.95) (layer "B.CrtYd") (width 0.05) (tstamp fd470e95-4861-44fe-b1e4-6d8a7c66e144))
+    (fp_line (start -1 0.6) (end 1 0.6) (layer "B.Fab") (width 0.1) (tstamp 6a45789b-3855-401f-8139-3c734f7f52f9))
+    (fp_line (start -1 -0.6) (end -1 0.6) (layer "B.Fab") (width 0.1) (tstamp 6c9b793c-e74d-4754-a2c0-901e73b26f1c))
+    (fp_line (start 1 -0.6) (end -1 -0.6) (layer "B.Fab") (width 0.1) (tstamp 716e31c5-485f-40b5-88e3-a75900da9811))
+    (fp_line (start 1 0.6) (end 1 -0.6) (layer "B.Fab") (width 0.1) (tstamp b1086f75-01ba-4188-8d36-75a9e2828ca9))
+    (pad "1" smd roundrect locked (at -1.025 0 270) (size 1.15 1.4) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.217391) (tstamp ce83728b-bebd-48c2-8734-b6a50d837931))
+    (pad "2" smd roundrect locked (at 1.025 0 270) (size 1.15 1.4) (layers "B.Cu" "B.Paste" "B.Mask") (roundrect_rratio 0.217391) (tstamp 181abe7a-f941-42b6-bd46-aaa3131f90fb))
+    (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl"
+      (offset (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (gr_line (start 100 25) (end 100 50) (layer "Edge.Cuts") (width 0.05) (tstamp 00000000-0000-0000-0000-00005ea7192f))
+  (gr_line (start 125 25) (end 125 50) (layer "Edge.Cuts") (width 0.05) (tstamp 00000000-0000-0000-0000-00005ea76efc))
+  (gr_line (start 100 25) (end 125 25) (layer "Edge.Cuts") (width 0.05) (tstamp 00000000-0000-0000-0000-00005ea76f1d))
+  (gr_line (start 100 50) (end 125 50) (layer "Edge.Cuts") (width 0.05) (tstamp 1a1ab354-5f85-45f9-938c-9f6c4c8c3ea2))
+
+  (via blind (at 119.25 37.75) (size 0.8) (drill 0.4) (layers "F.Cu" "In1.Cu") (net 0) (tstamp 97fe9c60-586f-4895-8504-4d3729f5f81a))
+  (via blind (at 117.5 36.25) (size 0.8) (drill 0.4) (layers "F.Cu" "In2.Cu") (net 0) (tstamp bdc7face-9f7c-4701-80bb-4cc144448db1))
+  (via blind (at 120.75 36.25) (size 0.8) (drill 0.4) (layers "In1.Cu" "In2.Cu") (net 0) (tstamp 922058ca-d09a-45fd-8394-05f3e2c1e03a))
+  (via blind (at 119.25 34.5) (size 0.8) (drill 0.4) (layers "In2.Cu" "B.Cu") (net 0) (tstamp 0f54db53-a272-4955-88fb-d7ab00657bb0))
+
+)

tests/test_plot/test_drill.py

@@ -24,25 +24,37 @@ positions = {'R1': (105, 35, 'top'), 'R2': (110, 35, 'bottom'), 'R3': (110, 45,
 
 
 def do_3Rs(test_dir, conf, dir, modern, single=False):
-    ctx = context.TestContext(test_dir, dir, '3Rs', conf, DRILL_DIR)
+    ctx = context.TestContext(test_dir, dir, '3Rs_bv', conf, DRILL_DIR)
     ctx.run()
     # Check all outputs are there
     pth_drl = ctx.get_pth_drl_filename()
     npth_drl = ctx.get_npth_drl_filename()
+    f1_drl = ctx.get_f1_drl_filename()
+    i12_drl = ctx.get_12_drl_filename()
     pth_pdf_drl = ctx.get_pth_pdf_drl_filename()
     npth_pdf_drl = ctx.get_npth_pdf_drl_filename()
+    f1_pdf_drl = ctx.get_f1_pdf_drl_filename()
+    i12_pdf_drl = ctx.get_12_pdf_drl_filename()
     pth_gbr_drl = ctx.get_pth_gbr_drl_filename()
     npth_gbr_drl = ctx.get_npth_gbr_drl_filename()
+    f1_gbr_drl = ctx.get_f1_gbr_drl_filename()
+    i12_gbr_drl = ctx.get_12_gbr_drl_filename()
     report = 'report.rpt'
 
     if modern:
         pth_drl = pth_drl.replace('PTH', 'PTH_drill')
         npth_drl = npth_drl.replace('PTH', 'PTH_drill')
+        f1_drl = f1_drl.replace('front-in1', 'front-in1_drill')
+        i12_drl = i12_drl.replace('in1-in2', 'in1-in2_drill')
         pth_gbr_drl = pth_gbr_drl.replace('-drl', '_drill')
         npth_gbr_drl = npth_gbr_drl.replace('-drl', '_drill')
+        f1_gbr_drl = f1_gbr_drl.replace('-drl', '_drill')
+        i12_gbr_drl = i12_gbr_drl.replace('-drl', '_drill')
         pth_pdf_drl = pth_pdf_drl.replace('-drl', '_drill')
         npth_pdf_drl = npth_pdf_drl.replace('-drl', '_drill')
-        report = '3Rs-drill_report.txt'
+        f1_pdf_drl = f1_pdf_drl.replace('-drl', '_drill')
+        i12_pdf_drl = i12_pdf_drl.replace('-drl', '_drill')
+        report = '3Rs_bv-drill_report.txt'
         if single:
             pth_drl = pth_drl.replace('PTH_', '')
             npth_drl = npth_drl.replace('NPTH_', '')
@@ -57,10 +69,16 @@ def do_3Rs(test_dir, conf, dir, modern, single=False):
     ctx.expect_out_file(os.path.join(DRILL_DIR, report))
     ctx.expect_out_file(pth_drl)
     ctx.expect_out_file(npth_drl)
+    ctx.expect_out_file(f1_drl)
+    ctx.expect_out_file(i12_drl)
     ctx.expect_out_file(pth_gbr_drl)
     ctx.expect_out_file(npth_gbr_drl)
+    ctx.expect_out_file(f1_gbr_drl)
+    ctx.expect_out_file(i12_gbr_drl)
     ctx.expect_out_file(pth_pdf_drl)
     ctx.expect_out_file(npth_pdf_drl)
+    ctx.expect_out_file(f1_pdf_drl)
+    ctx.expect_out_file(i12_pdf_drl)
     # We have R3 at (110, 45) length is 9 mm on X, drill 1 mm
     ctx.search_in_file(pth_drl, ['X110.0Y-45.0', 'X119.0Y-45.0'])
     ctx.expect_gerber_flash_at(pth_gbr_drl, 6, (110, -45))

tests/utils/context.py

@@ -217,6 +217,24 @@ class TestContext(object):
     def get_pth_pdf_drl_filename(self):
         return os.path.join(self.sub_dir, self.board_name+'-PTH-drl_map.pdf')
 
+    def get_f1_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-front-in1.drl')
+
+    def get_f1_gbr_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-front-in1-drl.gbr')
+
+    def get_f1_pdf_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-front-in1-drl_map.pdf')
+
+    def get_12_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-in1-in2.drl')
+
+    def get_12_gbr_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-in1-in2-drl.gbr')
+
+    def get_12_pdf_drl_filename(self):
+        return os.path.join(self.sub_dir, self.board_name+'-in1-in2-drl_map.pdf')
+
     def get_npth_drl_filename(self):
         return os.path.join(self.sub_dir, self.board_name+'-NPTH.drl')