diff --git a/kiplot/out_pdf_pcb_print.py b/kiplot/out_pdf_pcb_print.py index 535bdd98..41d8b88f 100644 --- a/kiplot/out_pdf_pcb_print.py +++ b/kiplot/out_pdf_pcb_print.py @@ -40,7 +40,9 @@ class PDF_Pcb_PrintOptions(BaseOptions): # Execute it logger.debug('Executing: '+str(cmd)) ret = call(cmd) - if ret: + if ret: # pragma: no cover + # We check all the arguments, we even load the PCB + # A fail here isn't easy to reproduce logger.error(CMD_PCBNEW_PRINT_LAYERS+' returned %d', ret) exit(PDF_PCB_PRINT) diff --git a/tests/test_plot/test_print_pcb.py b/tests/test_plot/test_print_pcb.py index 12ddde9f..bbc72a2e 100644 --- a/tests/test_plot/test_print_pcb.py +++ b/tests/test_plot/test_print_pcb.py @@ -19,7 +19,7 @@ if prev_dir not in sys.path: from utils import context PDF_DIR = 'Layers' -PDF_FILE = 'PCB_Top.pdf' +PDF_FILE = 'bom.pdf' PDF_FILE_B = 'PCB_Bot.pdf' diff --git a/tests/test_plot/test_yaml_errors.py b/tests/test_plot/test_yaml_errors.py index 15387ad4..61b0b6d4 100644 --- a/tests/test_plot/test_yaml_errors.py +++ b/tests/test_plot/test_yaml_errors.py @@ -421,3 +421,11 @@ def test_error_wrong_drill_marks(): ctx.run(EXIT_BAD_CONFIG) assert ctx.search_err("Unknown drill mark type: bogus") ctx.clean_up() + + +def test_error_print_pcb_no_layer(): + prj = 'bom' + ctx = context.TestContext('PrPCB', prj, 'error_print_pcb_no_layer', '') + ctx.run(EXIT_BAD_CONFIG) + assert ctx.search_err("Missing .?layers.? list") + ctx.clean_up() diff --git a/tests/yaml_samples/error_print_pcb_no_layer.kiplot.yaml b/tests/yaml_samples/error_print_pcb_no_layer.kiplot.yaml new file mode 100644 index 00000000..92f908f2 --- /dev/null +++ b/tests/yaml_samples/error_print_pcb_no_layer.kiplot.yaml @@ -0,0 +1,11 @@ +# Example KiPlot config file +kiplot: + version: 1 + +outputs: + - name: 'print_front' + comment: "Print F.Cu+F.SilkS" + type: pdf_pcb_print + dir: Layers + options: + output_name: PCB_Top.pdf diff --git a/tests/yaml_samples/print_pcb.kiplot.yaml b/tests/yaml_samples/print_pcb.kiplot.yaml index 5821712e..dda3d4a3 100644 --- a/tests/yaml_samples/print_pcb.kiplot.yaml +++ b/tests/yaml_samples/print_pcb.kiplot.yaml @@ -7,8 +7,6 @@ outputs: comment: "Print F.Cu+F.SilkS" type: pdf_pcb_print dir: Layers - options: - output_name: PCB_Top.pdf layers: - layer: F.Cu - layer: F.SilkS