Added crosses in the *.Fab layer for excluded components.
This commit is contained in:
parent
8bf0a13210
commit
b36e276969
1
Makefile
1
Makefile
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@ -109,6 +109,7 @@ gen_ref:
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src/kibot -c tests/yaml_samples/print_pdf_no_inductors_1.kibot.yaml -e tests/board_samples/test_v5.sch -d $(REFDIR)
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mv "$(REFDIR)no_inductor/test_v5-schematic_(no_L).pdf" $(REFDIR)
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rmdir $(REFDIR)no_inductor/
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src/kibot -b tests/board_samples/kibom-variant_4.kicad_pcb -c tests/yaml_samples/pdf_variant_1.kibot.yaml -d $(REFDIR)
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cp -a $(REFILL).ok $(REFILL)
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doc:
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@ -6,7 +6,7 @@
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# Project: KiBot (formerly KiPlot)
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# Adapted from: https://github.com/johnbeard/kiplot
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import os
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from pcbnew import GERBER_JOBFILE_WRITER, PLOT_CONTROLLER, IsCopperLayer, LSET
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from pcbnew import GERBER_JOBFILE_WRITER, PLOT_CONTROLLER, IsCopperLayer, LSET, wxPoint, EDGE_MODULE
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from .out_base import (BaseOutput)
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from .error import (PlotError, KiPlotConfigurationError)
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from .optionable import BaseOptions, Optionable
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@ -22,6 +22,28 @@ from . import log
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logger = log.get_logger(__name__)
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class Rect(object):
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""" What KiCad returns isn't a real wxWidget's wxRect.
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Here I add what I really need """
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def __init__(self):
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self.x1 = None
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self.y1 = None
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self.x2 = None
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self.y2 = None
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def Union(self, wxRect):
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if self.x1 is None:
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self.x1 = wxRect.x
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self.y1 = wxRect.y
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self.x2 = wxRect.x+wxRect.width
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self.y2 = wxRect.y+wxRect.height
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else:
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self.x1 = min(self.x1, wxRect.x)
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self.y1 = min(self.y1, wxRect.y)
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self.x2 = max(self.x2, wxRect.x+wxRect.width)
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self.y2 = max(self.y2, wxRect.y+wxRect.height)
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class AnyLayerOptions(BaseOptions):
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""" Base class for: DXF, Gerber, HPGL, PDF, PS and SVG """
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def __init__(self):
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@ -69,6 +91,22 @@ class AnyLayerOptions(BaseOptions):
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# We'll come back to this on a per-layer basis
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po.SetSkipPlotNPTH_Pads(False)
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@staticmethod
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def cross_module(m, rect, layer):
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seg1 = EDGE_MODULE(m)
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m.Add(seg1)
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seg1.SetWidth(120000)
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seg1.SetStart(wxPoint(rect.x1, rect.y1))
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seg1.SetEnd(wxPoint(rect.x2, rect.y2))
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seg1.SetLayer(layer)
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seg2 = EDGE_MODULE(m)
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m.Add(seg2)
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seg2.SetWidth(120000)
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seg2.SetStart(wxPoint(rect.x1, rect.y2))
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seg2.SetEnd(wxPoint(rect.x2, rect.y1))
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seg2.SetLayer(layer)
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return [seg1, seg2]
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def filter_components(self, board):
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# Apply the variants and filters
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exclude = None
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@ -92,8 +130,15 @@ class AnyLayerOptions(BaseOptions):
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badhes = board.GetLayerID('B.Adhes')
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old_fadhes = []
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old_badhes = []
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ffab = board.GetLayerID('F.Fab')
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bfab = board.GetLayerID('B.Fab')
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extra_ffab_lines = []
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extra_bfab_lines = []
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for m in board.GetModules():
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ref = m.GetReference()
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# Rectangle containing the drawings, no text
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frect = Rect()
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brect = Rect()
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c = comps_hash.get(ref, None)
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if (c and not c.fitted) or m.GetAttributes() == UI_VIRTUAL:
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# Remove all pads from *.Paste
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@ -105,6 +150,7 @@ class AnyLayerOptions(BaseOptions):
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p.SetLayerSet(pad_layers)
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old_layers.append(old_c_layers)
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# Remove any graphical item in the *.Adhes layers
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# Also: meassure the *.Fab drawings size
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for gi in m.GraphicalItems():
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l_gi = gi.GetLayer()
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if l_gi == fadhes:
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@ -113,12 +159,27 @@ class AnyLayerOptions(BaseOptions):
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if l_gi == badhes:
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gi.SetLayer(-1)
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old_badhes.append(gi)
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# if gi.GetClass() == 'MGRAPHIC':
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# logger.debug(gi.GetShapeStr())
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if gi.GetClass() == 'MGRAPHIC':
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if l_gi == ffab:
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frect.Union(gi.GetBoundingBox().getWxRect())
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if l_gi == bfab:
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brect.Union(gi.GetBoundingBox().getWxRect())
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# Cross the graphics in *.Fab
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if frect.x1 is not None:
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extra_ffab_lines.append(self.cross_module(m, frect, ffab))
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else:
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extra_ffab_lines.append(None)
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if brect.x1 is not None:
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extra_bfab_lines.append(self.cross_module(m, brect, bfab))
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else:
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extra_bfab_lines.append(None)
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# Store the data to undo the above actions
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self.comps_hash = comps_hash
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self.old_layers = old_layers
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self.old_fadhes = old_fadhes
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self.old_badhes = old_badhes
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self.extra_ffab_lines = extra_ffab_lines
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self.extra_bfab_lines = extra_bfab_lines
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return exclude
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def unfilter_components(self, board):
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@ -132,6 +193,14 @@ class AnyLayerOptions(BaseOptions):
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res = restore.pop(0)
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pad_layers.ParseHex(res, len(res))
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p.SetLayerSet(pad_layers)
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restore = self.extra_ffab_lines.pop(0)
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if restore:
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for line in restore:
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m.Remove(line)
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restore = self.extra_bfab_lines.pop(0)
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if restore:
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for line in restore:
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m.Remove(line)
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fadhes = board.GetLayerID('F.Adhes')
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for gi in self.old_fadhes:
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gi.SetLayer(fadhes)
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@ -0,0 +1,308 @@
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(kicad_pcb (version 20171130) (host pcbnew 5.1.6+dfsg1-1)
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(general
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(thickness 1.6)
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(drawings 5)
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(tracks 0)
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(zones 0)
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(modules 5)
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(nets 9)
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)
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(page A4)
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(layers
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(0 F.Cu signal)
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(31 B.Cu signal)
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(32 B.Adhes user)
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(33 F.Adhes user)
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(34 B.Paste user)
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(35 F.Paste user)
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(36 B.SilkS user)
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(37 F.SilkS user)
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(38 B.Mask user)
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(39 F.Mask user)
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(40 Dwgs.User user)
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(41 Cmts.User user)
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(42 Eco1.User user)
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(43 Eco2.User user)
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(44 Edge.Cuts user)
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(45 Margin user)
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(46 B.CrtYd user)
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(47 F.CrtYd user)
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(48 B.Fab user)
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(49 F.Fab user)
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)
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(setup
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(last_trace_width 0.25)
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(trace_clearance 0.2)
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(zone_clearance 0.508)
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(zone_45_only no)
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(trace_min 0.2)
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(via_size 0.8)
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(via_drill 0.4)
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(via_min_size 0.4)
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(via_min_drill 0.3)
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(uvia_size 0.3)
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(uvia_drill 0.1)
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(uvias_allowed no)
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(uvia_min_size 0.2)
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(uvia_min_drill 0.1)
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(edge_width 0.1)
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(segment_width 0.2)
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(pcb_text_width 0.3)
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(pcb_text_size 1.5 1.5)
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(mod_edge_width 0.15)
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(mod_text_size 1 1)
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(mod_text_width 0.15)
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(pad_size 1.524 1.524)
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(pad_drill 0.762)
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(pad_to_mask_clearance 0)
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(aux_axis_origin 139.89 89.63)
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(visible_elements FFFFFF7F)
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(pcbplotparams
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(layerselection 0x010fc_ffffffff)
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(usegerberextensions false)
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(usegerberattributes true)
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(usegerberadvancedattributes true)
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(creategerberjobfile true)
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(excludeedgelayer true)
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(linewidth 0.100000)
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(plotframeref false)
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(viasonmask false)
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(mode 1)
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(useauxorigin false)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(psnegative false)
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(psa4output false)
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(plotreference true)
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(plotvalue true)
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(plotinvisibletext false)
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(padsonsilk false)
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(subtractmaskfromsilk false)
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(outputformat 1)
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(mirror false)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory ""))
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)
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(net 0 "")
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(net 1 "Net-(C1-Pad2)")
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(net 2 "Net-(C1-Pad1)")
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(net 3 "Net-(C2-Pad2)")
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(net 4 "Net-(C2-Pad1)")
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(net 5 "Net-(R1-Pad2)")
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(net 6 "Net-(R1-Pad1)")
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(net 7 "Net-(R2-Pad2)")
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(net 8 "Net-(R2-Pad1)")
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(net_class Default "Esta es la clase de red por defecto."
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(clearance 0.2)
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(trace_width 0.25)
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(via_dia 0.8)
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(via_drill 0.4)
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(uvia_dia 0.3)
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(uvia_drill 0.1)
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(add_net "Net-(C1-Pad1)")
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(add_net "Net-(C1-Pad2)")
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(add_net "Net-(C2-Pad1)")
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(add_net "Net-(C2-Pad2)")
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(add_net "Net-(R1-Pad1)")
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(add_net "Net-(R1-Pad2)")
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(add_net "Net-(R2-Pad1)")
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(add_net "Net-(R2-Pad2)")
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)
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(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F503C4A)
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(at 148.555 89.154)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags resistor)
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(path /5F43D144)
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(attr smd)
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(fp_text reference R3 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 1k (at 0 1.65) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 0.4 0) (layer F.Adhes) (width 0.1))
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
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(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
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(at (xyz 0 0 0))
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F496A8B)
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(at 141.57 90.58)
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags resistor)
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(path /5F43D4BB)
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(fp_text reference R2 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 1000 (at 1.178 2.13) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 0.4 0) (layer F.Adhes) (width 0.1))
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
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(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 7 "Net-(R2-Pad2)"))
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(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
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(net 8 "Net-(R2-Pad1)"))
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(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
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(at (xyz 0 0 0))
|
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(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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|
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(module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F503C2A)
|
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(at 141.57 87.63)
|
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(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
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(tags resistor)
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(path /5F43D144)
|
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(attr smd)
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(fp_text reference R1 (at 0 -1.65) (layer F.SilkS)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value 1k (at 0 1.65) (layer F.Fab)
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(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_circle (center 0 0) (end 0.4 0) (layer F.Adhes) (width 0.1))
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(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
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(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
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(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
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(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
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(fp_text user %R (at 0 0) (layer F.Fab)
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(effects (font (size 0.5 0.5) (thickness 0.08)))
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)
|
||||
(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||
(net 5 "Net-(R1-Pad2)"))
|
||||
(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||
(net 6 "Net-(R1-Pad1)"))
|
||||
(model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module Capacitor_SMD:C_0805_2012Metric (layer B.Cu) (tedit 5B36C52B) (tstamp 5F496A69)
|
||||
(at 137.16 90.58)
|
||||
(descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
|
||||
(tags capacitor)
|
||||
(path /5F43CE1C)
|
||||
(fp_text reference C2 (at 0 1.65) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_text value "1000 pF" (at -0.508 -2.13) (layer B.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 0.4 0) (layer B.Adhes) (width 0.1))
|
||||
(fp_line (start 1.68 -0.95) (end -1.68 -0.95) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.68 0.95) (end 1.68 -0.95) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.68 0.95) (end 1.68 0.95) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.68 -0.95) (end -1.68 0.95) (layer B.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer B.SilkS) (width 0.12))
|
||||
(fp_line (start 1 -0.6) (end -1 -0.6) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start 1 0.6) (end 1 -0.6) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1 0.6) (end 1 0.6) (layer B.Fab) (width 0.1))
|
||||
(fp_line (start -1 -0.6) (end -1 0.6) (layer B.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer B.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
|
||||
)
|
||||
(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
||||
(net 3 "Net-(C2-Pad2)"))
|
||||
(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
|
||||
(net 4 "Net-(C2-Pad1)"))
|
||||
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(module Capacitor_SMD:C_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F496A58)
|
||||
(at 137.16 87.63)
|
||||
(descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
|
||||
(tags capacitor)
|
||||
(path /5F43BEC2)
|
||||
(attr virtual)
|
||||
(fp_text reference C1 (at 0 -1.65) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value 1nF (at 0 1.65) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_circle (center 0 0) (end 0.4 0) (layer F.Adhes) (width 0.1))
|
||||
(fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
|
||||
(fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
|
||||
(fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
|
||||
(fp_text user %R (at 0 0) (layer F.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)))
|
||||
)
|
||||
(pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||
(net 1 "Net-(C1-Pad2)"))
|
||||
(pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
|
||||
(net 2 "Net-(C1-Pad1)"))
|
||||
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
|
||||
(at (xyz 0 0 0))
|
||||
(scale (xyz 1 1 1))
|
||||
(rotate (xyz 0 0 0))
|
||||
)
|
||||
)
|
||||
|
||||
(gr_text "Bogus component.\nNot in schematic." (at 161.163 89.281) (layer Cmts.User)
|
||||
(effects (font (size 1.5 1.5) (thickness 0.3)))
|
||||
)
|
||||
(gr_line (start 133.35 83.82) (end 133.35 93.98) (layer Edge.Cuts) (width 0.1) (tstamp 5F496ACC))
|
||||
(gr_line (start 146.05 83.82) (end 133.35 83.82) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_line (start 146.05 93.98) (end 146.05 83.82) (layer Edge.Cuts) (width 0.1))
|
||||
(gr_line (start 133.35 93.98) (end 146.05 93.98) (layer Edge.Cuts) (width 0.1))
|
||||
|
||||
)
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title "KiBom Test Schematic"
|
||||
Date "2020-03-12"
|
||||
Rev "A"
|
||||
Comp "https://github.com/SchrodingersGat/KiBom"
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
Text Notes 500 750 0 79 ~ 0
|
||||
This schematic serves as a test-file for the KiBot export script.\nHere we implement the IBoM variants style.
|
||||
$Comp
|
||||
L Device:C C1
|
||||
U 1 1 5F43BEC2
|
||||
P 1000 1700
|
||||
F 0 "C1" H 1115 1746 50 0000 L CNN
|
||||
F 1 "1nF" H 1115 1655 50 0000 L CNN
|
||||
F 2 "Capacitor_SMD:C_0805_2012Metric" H 1038 1550 50 0001 C CNN
|
||||
F 3 "~" H 1000 1700 50 0001 C CNN
|
||||
F 4 "T2" H 1000 1700 50 0001 C CNN "Config"
|
||||
1 1000 1700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C C2
|
||||
U 1 1 5F43CE1C
|
||||
P 1450 1700
|
||||
F 0 "C2" H 1565 1746 50 0000 L CNN
|
||||
F 1 "1000 pF" H 1565 1655 50 0000 L CNN
|
||||
F 2 "Capacitor_SMD:C_0805_2012Metric" H 1488 1550 50 0001 C CNN
|
||||
F 3 "~" H 1450 1700 50 0001 C CNN
|
||||
F 4 "T3" H 1450 1700 50 0001 C CNN "Config"
|
||||
1 1450 1700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:R R1
|
||||
U 1 1 5F43D144
|
||||
P 2100 1700
|
||||
F 0 "R1" H 2170 1746 50 0000 L CNN
|
||||
F 1 "1k" H 2170 1655 50 0000 L CNN
|
||||
F 2 "Resistor_SMD:R_0805_2012Metric" V 2030 1700 50 0001 C CNN
|
||||
F 3 "~" H 2100 1700 50 0001 C CNN
|
||||
F 4 "default" H 2100 1700 50 0001 C CNN "Config"
|
||||
1 2100 1700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:R R2
|
||||
U 1 1 5F43D4BB
|
||||
P 2500 1700
|
||||
F 0 "R2" H 2570 1746 50 0000 L CNN
|
||||
F 1 "1000" H 2570 1655 50 0000 L CNN
|
||||
F 2 "Resistor_SMD:R_0805_2012Metric" V 2430 1700 50 0001 C CNN
|
||||
F 3 "~" H 2500 1700 50 0001 C CNN
|
||||
F 4 "T1" H 2500 1700 50 0001 C CNN "Config"
|
||||
1 2500 1700
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Text Notes 5950 3200 0 118 ~ 0
|
||||
The test tests the following \nvariants matrix:\n production test default\nC1 X\nC2 X X\nR1 X X X\nR2 X X\n\nproduction: blacklist T2\ntest: blacklist T1\ndefault: whitelist T1,default \n blacklist T2,T3
|
||||
$EndSCHEMATC
|
||||
Binary file not shown.
Binary file not shown.
|
|
@ -104,7 +104,6 @@ def test_gerber_variant_1():
|
|||
prj = 'kibom-variant_3'
|
||||
ctx = context.TestContext('test_gerber_variant_1', prj, 'gerber_variant_1', GERBER_DIR)
|
||||
ctx.run()
|
||||
|
||||
# C1 is virtual, not included for all cases
|
||||
# R3 is a component added to the PCB, included in all cases
|
||||
# variant: default directory: gerber components: R1, R2 and R3
|
||||
|
|
|
|||
|
|
@ -22,13 +22,11 @@ def test_pdf():
|
|||
prj = 'simple_2layer'
|
||||
ctx = context.TestContext('Plot_PDF', prj, 'pdf', PS_DIR)
|
||||
ctx.run()
|
||||
|
||||
f_cu = ctx.get_gerber_filename('F_Cu', '.pdf')
|
||||
f_silk = ctx.get_gerber_filename('B_Silks', '.pdf')
|
||||
ctx.expect_out_file(f_cu)
|
||||
ctx.expect_out_file(f_silk)
|
||||
ctx.dont_expect_out_file(ctx.get_gerber_job_filename())
|
||||
|
||||
ctx.clean_up()
|
||||
|
||||
|
||||
|
|
@ -36,7 +34,20 @@ def test_pdf_refill():
|
|||
prj = 'zone-refill'
|
||||
ctx = context.TestContext('Plot_PDF_Refill', prj, 'pdf_zone-refill', '')
|
||||
ctx.run()
|
||||
|
||||
b_cu = ctx.get_gerber_filename('B_Cu', '.pdf')
|
||||
ctx.expect_out_file(b_cu)
|
||||
ctx.compare_image(b_cu)
|
||||
ctx.clean_up()
|
||||
|
||||
|
||||
def test_pdf_variant_1():
|
||||
prj = 'kibom-variant_4'
|
||||
ctx = context.TestContext('test_pdf_variant_1', prj, 'pdf_variant_1', '')
|
||||
ctx.run()
|
||||
fname = prj+'-F_Fab.pdf'
|
||||
ctx.expect_out_file(fname)
|
||||
ctx.compare_image(fname)
|
||||
fname = prj+'-B_Fab.pdf'
|
||||
ctx.expect_out_file(fname)
|
||||
ctx.compare_image(fname)
|
||||
ctx.clean_up()
|
||||
|
|
|
|||
|
|
@ -0,0 +1,18 @@
|
|||
# Example KiBot config file
|
||||
kibot:
|
||||
version: 1
|
||||
|
||||
variants:
|
||||
- name: 'default'
|
||||
comment: 'Default variant'
|
||||
type: ibom
|
||||
variants_blacklist: T2,T3
|
||||
|
||||
outputs:
|
||||
- name: 'pdf_default'
|
||||
comment: "PDF w/variant"
|
||||
type: pdf
|
||||
layers: [ F.Fab, B.Fab ]
|
||||
options:
|
||||
variant: default
|
||||
|
||||
Loading…
Reference in New Issue