Fixed KiCad 6 text variables not expanded in `render_3d` output

- We must copy the project file to the temporal dir
Fixes #173
This commit is contained in:
Salvador E. Tropea 2022-04-02 12:14:56 -03:00
parent dad1f91439
commit bb0f86ae61
13 changed files with 530 additions and 19 deletions

View File

@ -14,6 +14,7 @@ except ImportError:
pass
from datetime import datetime, date
from sys import exit
from shutil import copy2
from .misc import EXIT_BAD_ARGS, W_DATEFORMAT, KICAD_VERSION_5_99, W_UNKVAR
from .log import get_logger
@ -326,6 +327,16 @@ class GS(object):
logger.error('No SCH file found (*.sch), use -e to specify one.')
exit(EXIT_BAD_ARGS)
@staticmethod
def copy_project(pcb_name):
pro_name = GS.pro_file
if pro_name is None or not os.path.isfile(pro_name):
return None
pro_copy = pcb_name.replace('.kicad_pcb', GS.pro_ext)
logger.debug('Copying project `{}` to `{}`'.format(pro_name, pro_copy))
copy2(pro_name, pro_copy)
return pro_copy
@staticmethod
def load_board():
""" Will be repplaced by kiplot.py """

View File

@ -4,7 +4,7 @@
# License: GPL-3.0
# Project: KiBot (formerly KiPlot)
import os
from shutil import copy2, rmtree
from shutil import rmtree
from tempfile import mkdtemp
from .pre_base import BasePreFlight
from .error import KiPlotConfigurationError
@ -68,16 +68,6 @@ class Any_PCB_PrintOptions(VariantOptions):
super().config(parent)
self._drill_marks = Any_PCB_PrintOptions._drill_marks_map[self._drill_marks]
@staticmethod
def _copy_project(fname):
pro_name = GS.pro_file
if pro_name is None or not os.path.isfile(pro_name):
return None
pro_copy = fname.replace('.kicad_pcb', GS.pro_ext)
logger.debug('Copying project `{}` to `{}`'.format(pro_name, pro_copy))
copy2(pro_name, pro_copy)
return pro_copy
def filter_components(self, board, force_copy):
if not self._comps and not force_copy:
return GS.pcb_file, None
@ -92,7 +82,7 @@ class Any_PCB_PrintOptions(VariantOptions):
logger.debug('Storing filtered PCB to `{}`'.format(fname))
GS.board.Save(fname)
# Copy the project: avoids warnings, could carry some options
self._copy_project(fname)
GS.copy_project(fname)
self.uncross_modules(board, comps_hash)
self.restore_paste_and_glue(board, comps_hash)
if self.hide_excluded:

View File

@ -187,8 +187,7 @@ class Base3DOptions(VariantOptions):
fname = f.name
logger.debug('Storing modified PCB to `{}`'.format(fname))
GS.board.Save(fname)
with open(fname.replace('.kicad_pcb', GS.pro_ext), 'wt') as f:
pass
GS.copy_project(fname)
return fname
def apply_variant_aspect(self, enable=False):

View File

@ -229,6 +229,9 @@
(property "Config" "T1" (id 4) (at 63.5 43.18 0)
(effects (font (size 1.27 1.27)) hide)
)
(property "default:_3D_model" "${KICAD6_3DMODEL_DIR}/Resistor_SMD.3dshapes/R_2010_5025Metric.wrl" (id 4) (at 63.5 43.18 0)
(effects (font (size 1.27 1.27)) hide)
)
(pin "1" (uuid c70d9ef3-bfeb-47e0-a1e1-9aeba3da7864))
(pin "2" (uuid 4e3d7c0d-12e3-42f2-b944-e4bcdbbcac2a))
)

View File

@ -0,0 +1,325 @@
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(41 "Cmts.User" user "User.Comments")
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(path "/00000000-0000-0000-0000-00005f43d144")
(attr smd)
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(fp_line (start 1 -0.6) (end 1 0.6) (layer "F.Fab") (width 0.1) (tstamp d540225e-b626-44df-a06e-d1355b1826a9))
(fp_line (start 1 0.6) (end -1 0.6) (layer "F.Fab") (width 0.1) (tstamp d7ea9ea0-5b1e-4200-8463-6407ba1b21a5))
(pad "1" smd roundrect locked (at -0.9375 0) (size 0.975 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 6 "Net-(R1-Pad1)") (tstamp 7c75769f-18a4-4d0c-9703-f047e8f5ab1d))
(pad "2" smd roundrect locked (at 0.9375 0) (size 0.975 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25)
(net 5 "Net-(R1-Pad2)") (tstamp 2b8f6242-95b2-4ff4-8124-8f1c2a171f0a))
(model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.step"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(footprint "Fiducial:Fiducial_0.5mm_Mask1mm" (layer "F.Cu")
(tedit 5C18CB26) (tstamp 00000000-0000-0000-0000-00005f57ee4f)
(at 139.6746 82.9564)
(descr "Circular Fiducial, 0.5mm bare copper, 1mm soldermask opening (Level C)")
(tags "fiducial")
(path "/00000000-0000-0000-0000-00005f57eddb")
(attr exclude_from_pos_files exclude_from_bom)
(fp_text reference "FID1" (at 0 -1.5) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
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(effects (font (size 0.2 0.2) (thickness 0.04)))
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(fp_circle (center 0 0) (end 0.75 0) (layer "F.CrtYd") (width 0.05) (fill none) (tstamp bd1aa9f8-fd9c-4c73-ad79-67b18a6317f1))
(fp_circle (center 0 0) (end 0.5 0) (layer "F.Fab") (width 0.1) (fill none) (tstamp b2736e48-774d-475e-b008-2b03645f9be3))
(pad "" smd circle locked (at 0 0) (size 0.5 0.5) (layers "F.Cu" "F.Mask")
(solder_mask_margin 0.25) (clearance 0.25) (tstamp 1dde19d5-99c8-4d8b-8f79-2b55c7e0cf67))
)
(gr_line (start 133.35 80.4) (end 133.35 93.98) (layer "Edge.Cuts") (width 0.1) (tstamp 00000000-0000-0000-0000-00005f496acc))
(gr_line (start 146.05 80.4) (end 133.35 80.4) (layer "Edge.Cuts") (width 0.1) (tstamp 00000000-0000-0000-0000-00005f57eeaf))
(gr_line (start 146.05 93.98) (end 146.05 80.4) (layer "Edge.Cuts") (width 0.1) (tstamp 123e2e63-e5a2-438b-a092-e86abe433be1))
(gr_line (start 133.35 93.98) (end 146.05 93.98) (layer "Edge.Cuts") (width 0.1) (tstamp db70ada3-b7ba-4225-9c00-3f7474e61b64))
(gr_text "${text}" (at 139 92.5) (layer "F.SilkS") (tstamp b873bc5d-a9af-4bd9-afcb-87ce4d417120)
(effects (font (size 1 1.5) (thickness 0.25)))
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(gr_text "Bogus component.\nNot in schematic." (at 161.163 89.281) (layer "Cmts.User") (tstamp 5f5ef4dd-f4ae-40a8-adf2-0ac2296d03fa)
(effects (font (size 1.5 1.5) (thickness 0.3)))
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)

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@ -0,0 +1,176 @@
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.762,
"height": 1.524,
"width": 1.524
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.508
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.01,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [],
"via_dimensions": [],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "kibom-variant_3_txt.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"legacy_lib_dir": "",
"legacy_lib_list": []
},
"sheets": [],
"text_variables": {
"text": "Test"
}
}

View File

@ -0,0 +1 @@
kibom-variant_3.kicad_sch

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@ -0,0 +1 @@
../5_1_6/kibom-variant_3-3D_top.png

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@ -72,8 +72,12 @@ def test_step_variant_1(test_dir):
def test_render_3d_variant_1(test_dir):
prj = 'kibom-variant_3'
if context.ki6():
prj += '_txt'
ctx = context.TestContext(test_dir, 'test_render_3d_variant_1', prj, 'render_3d_variant_1', '')
ctx.run(extra_debug=True)
ctx.run()
# Check all outputs are there
ctx.expect_out_file(prj+'-3D_top.png')
name = prj+'-3D_top.png'
ctx.expect_out_file(name)
ctx.compare_image(name, fuzz='50%', tol=100)
ctx.clean_up(keep_project=True)

View File

@ -433,7 +433,7 @@ class TestContext(object):
logging.debug(msg+' OK')
# logging.debug(' '+m.group(0))
def compare_image(self, image, reference=None, diff='diff.png', ref_out_dir=False, fuzz='5%'):
def compare_image(self, image, reference=None, diff='diff.png', ref_out_dir=False, fuzz='5%', tol=0):
""" For images and single page PDFs """
if reference is None:
reference = image
@ -464,7 +464,7 @@ class TestContext(object):
'-colorspace', 'RGB',
self.get_out_path(diff)]
logging.debug('Comparing images with: '+usable_cmd(cmd))
res = subprocess.check_output(cmd, stderr=subprocess.STDOUT)
res = subprocess.run(cmd, stderr=subprocess.STDOUT, check=(tol == 0), stdout=subprocess.PIPE).stdout
# m = re.match(r'([\d\.e-]+) \(([\d\.e-]+)\)', res.decode())
# assert m
# logging.debug('MSE={} ({})'.format(m.group(1), m.group(2)))
@ -474,7 +474,7 @@ class TestContext(object):
os.remove(png_ref)
if png_image:
os.remove(png_image)
assert ae == 0
assert ae <= tol
def compare_pdf(self, gen, reference=None, diff='diff-{}.png'):
""" For multi-page PDFs """

View File

@ -25,3 +25,4 @@ outputs:
type: render_3d
options:
variant: default
ray_tracing: true