[Fixed] Spell errors
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parent
950a875c33
commit
d7392d59ec
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@ -78,7 +78,7 @@ repos:
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# hooks:
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# hooks:
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# - id: isort
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# - id: isort
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- repo: https://github.com/codespell-project/codespell
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- repo: https://github.com/codespell-project/codespell
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rev: v2.1.0
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rev: v2.2.6
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hooks:
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hooks:
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- id: codespell
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- id: codespell
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# - repo: https://github.com/pre-commit/mirrors-mypy
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# - repo: https://github.com/pre-commit/mirrors-mypy
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@ -217,7 +217,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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get the old behavior.
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get the old behavior.
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- Git diff link file name:
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- Git diff link file name:
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- Now we default to using worktrees instead of stash push/pop. As a side
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- Now we default to using worktrees instead of stash push/pop. As a side
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effect the names of the git points are chnaged. This is because main/master
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effect the names of the git points are changed. This is because main/master
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only applies to the main worktree. So the names now refer to the closest
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only applies to the main worktree. So the names now refer to the closest
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tag.
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tag.
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- JLCPCB_stencil: Is now just like JLCPCB. The only difference is the added
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- JLCPCB_stencil: Is now just like JLCPCB. The only difference is the added
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@ -973,7 +973,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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internal BoM. They are usually mistakes that prevents grouping components.
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internal BoM. They are usually mistakes that prevents grouping components.
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### Fixed
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### Fixed
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- The variants logic for BoMs when a component resquested to be only added to
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- The variants logic for BoMs when a component requested to be only added to
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more than one variant.
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more than one variant.
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- Removed warnings about malformed values for DNF components indicating it in
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- Removed warnings about malformed values for DNF components indicating it in
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its value.
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its value.
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@ -83,7 +83,7 @@ Filter B:
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In order to create a schematic for the whole system you create a third project.
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In order to create a schematic for the whole system you create a third project.
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In this project you use hierarchichal sheets to join both projects and show
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In this project you use hierarchical sheets to join both projects and show
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how they are connected.
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how they are connected.
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@ -1927,7 +1927,7 @@ class Schematic(object):
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def save_netlist_components(self, root, comps, excluded, fitted, no_field):
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def save_netlist_components(self, root, comps, excluded, fitted, no_field):
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""" Generates the `components` section of the netlist """
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""" Generates the `components` section of the netlist """
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components = SubElement(root, 'components')
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components = SubElement(root, 'components')
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# Colapse units
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# Collapse units
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real_comps = []
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real_comps = []
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tstamps = {}
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tstamps = {}
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for c in comps:
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for c in comps:
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@ -274,7 +274,7 @@ def capture_value(value, name):
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# whether the captured value is used in the current process, or in another
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# whether the captured value is used in the current process, or in another
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# Python process later.
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# Python process later.
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#
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#
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# If the macro expansion result is to remain available for re-use from a
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# If the macro expansion result is to remain available for reuse from a
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# `.pyc`, we must serialize and store the captured value to disk, so that
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# `.pyc`, we must serialize and store the captured value to disk, so that
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# values from "macro expansion time last week" are still available when the
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# values from "macro expansion time last week" are still available when the
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# `.pyc` is loaded in another Python process later.
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# `.pyc` is loaded in another Python process later.
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@ -327,7 +327,7 @@ class VariantOptions(BaseOptions):
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brect = Rect()
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brect = Rect()
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c = comps_hash.get(ref, None)
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c = comps_hash.get(ref, None)
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if c and c.included and not c.fitted:
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if c and c.included and not c.fitted:
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# Meassure the component BBox (only graphics)
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# Measure the component BBox (only graphics)
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for gi in m.GraphicalItems():
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for gi in m.GraphicalItems():
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if gi.GetClass() == GS.footprint_gr_type:
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if gi.GetClass() == GS.footprint_gr_type:
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l_gi = gi.GetLayer()
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l_gi = gi.GetLayer()
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@ -419,7 +419,7 @@ class VariantOptions(BaseOptions):
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old_c_layers.append(pad_layers.FmtHex())
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old_c_layers.append(pad_layers.FmtHex())
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pad_layers.removeLayerSet(exclude)
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pad_layers.removeLayerSet(exclude)
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if len(pad_layers.Seq()) == 0:
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if len(pad_layers.Seq()) == 0:
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# No layers at all. Ridiculous, but happends.
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# No layers at all. Ridiculous, but happens.
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# At least add an F.Mask
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# At least add an F.Mask
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pad_layers.addLayer(fmask if is_front else bmask)
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pad_layers.addLayer(fmask if is_front else bmask)
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logger.warning(W_WRONGPASTE+'Pad with solder paste, but no copper or solder mask aperture in '+ref)
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logger.warning(W_WRONGPASTE+'Pad with solder paste, but no copper or solder mask aperture in '+ref)
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@ -220,7 +220,7 @@ class BlenderPointOfViewOptions(Optionable):
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""" *[top,bottom,front,rear,right,left,z,Z,y,Y,x,X] Point of view.
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""" *[top,bottom,front,rear,right,left,z,Z,y,Y,x,X] Point of view.
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Compatible with `render_3d` """
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Compatible with `render_3d` """
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self.file_id = ''
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self.file_id = ''
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""" String to diferentiate the name of this point of view.
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""" String to differentiate the name of this point of view.
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When empty we use the `default_file_id` or the `view` """
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When empty we use the `default_file_id` or the `view` """
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self.steps = 1
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self.steps = 1
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""" [1-1000] Generate this amount of steps using the rotation angles as increments.
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""" [1-1000] Generate this amount of steps using the rotation angles as increments.
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@ -1029,7 +1029,7 @@ class BoM(BaseOutput): # noqa: F821
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fld_names_l = [f.lower() for f in fld_names]
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fld_names_l = [f.lower() for f in fld_names]
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fld_set = set(fld_names_l)
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fld_set = set(fld_names_l)
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logger.debug(' - Available fields {}'.format(fld_names_l))
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logger.debug(' - Available fields {}'.format(fld_names_l))
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# Look for the manufaturer part number
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# Look for the manufacturer part number
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mpn_set = {k for k, v in KICOST_NAME_TRANSLATIONS.items() if v == 'manf#'}
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mpn_set = {k for k, v in KICOST_NAME_TRANSLATIONS.items() if v == 'manf#'}
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mpn_set.add('manf#')
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mpn_set.add('manf#')
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mpn_fields = fld_set.intersection(mpn_set)
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mpn_fields = fld_set.intersection(mpn_set)
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@ -76,7 +76,7 @@ class DiffOptions(VariantOptions):
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""" Directory to cache the intermediate files. Leave it blank to disable the cache """
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""" Directory to cache the intermediate files. Leave it blank to disable the cache """
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self.diff_mode = 'red_green'
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self.diff_mode = 'red_green'
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""" [red_green,stats] In the `red_green` mode added stuff is green and red when removed.
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""" [red_green,stats] In the `red_green` mode added stuff is green and red when removed.
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The `stats` mode is used to meassure the amount of difference. In this mode all
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The `stats` mode is used to measure the amount of difference. In this mode all
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changes are red, but you can abort if the difference is bigger than certain threshold """
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changes are red, but you can abort if the difference is bigger than certain threshold """
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self.fuzz = 5
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self.fuzz = 5
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""" [0,100] Color tolerance (fuzzyness) for the `stats` mode """
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""" [0,100] Color tolerance (fuzzyness) for the `stats` mode """
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@ -102,7 +102,7 @@ class DiffOptions(VariantOptions):
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`file_id` instead of its name """
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`file_id` instead of its name """
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self.only_different = False
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self.only_different = False
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""" Only include the pages with differences in the output PDF.
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""" Only include the pages with differences in the output PDF.
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Note that when no differeces are found we get a page saying *No diff* """
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Note that when no differences are found we get a page saying *No diff* """
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self.only_first_sch_page = False
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self.only_first_sch_page = False
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""" Compare only the main schematic page (root page) """
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""" Compare only the main schematic page (root page) """
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self.always_fail_if_missing = False
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self.always_fail_if_missing = False
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@ -241,7 +241,7 @@ class PcbDrawOptions(VariantOptions):
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self.show_solderpaste = True
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self.show_solderpaste = True
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""" Show the solder paste layers """
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""" Show the solder paste layers """
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self.resistor_remap = PcbDrawResistorRemap
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self.resistor_remap = PcbDrawResistorRemap
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""" [list(dict)] List of resitors to be remapped. You can change the value of the resistors here """
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""" [list(dict)] List of resistors to be remapped. You can change the value of the resistors here """
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self.resistor_flip = Optionable
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self.resistor_flip = Optionable
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""" [string|list(string)=''] List of resistors to flip its bands """
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""" [string|list(string)=''] List of resistors to flip its bands """
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self.size_detection = 'kicad_edge'
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self.size_detection = 'kicad_edge'
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@ -70,7 +70,7 @@ class PopulateOptions(VariantOptions):
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raise KiPlotConfigurationError('Missing input file `{}`'.format(self.input))
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raise KiPlotConfigurationError('Missing input file `{}`'.format(self.input))
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# Initial components
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# Initial components
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self.initial_components = Optionable.force_list(self.initial_components)
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self.initial_components = Optionable.force_list(self.initial_components)
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# Validate the image patter name
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# Validate the image pattern name
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if '%d' not in self.imgname:
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if '%d' not in self.imgname:
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raise KiPlotConfigurationError('The image pattern must contain `%d` `{}`'.format(self.imgname))
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raise KiPlotConfigurationError('The image pattern must contain `%d` `{}`'.format(self.imgname))
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@ -182,7 +182,7 @@ class TextElement(FigureElement):
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class ImageElement(FigureElement):
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class ImageElement(FigureElement):
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"""Inline image element.
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"""Inline image element.
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Correspoonds to SVG ``<image>`` tag. Image data encoded as base64 string.
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Corresponds to SVG ``<image>`` tag. Image data encoded as base64 string.
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"""
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"""
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def __init__(self, stream, width, height, format="png"):
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def __init__(self, stream, width, height, format="png"):
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@ -914,7 +914,7 @@ def test_compress_sources_1(test_dir):
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def test_date_format_1(test_dir):
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def test_date_format_1(test_dir):
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""" Date from SCH reformated """
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""" Date from SCH reformatted """
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prj = 'test_v5'
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prj = 'test_v5'
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ctx = context.TestContext(test_dir, prj, 'date_format_1')
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ctx = context.TestContext(test_dir, prj, 'date_format_1')
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ctx.run(extra=[])
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ctx.run(extra=[])
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@ -923,7 +923,7 @@ def test_date_format_1(test_dir):
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def test_date_format_2(test_dir):
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def test_date_format_2(test_dir):
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""" Date from SCH reformated """
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""" Date from SCH reformatted """
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prj = 'bom'
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prj = 'bom'
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ctx = context.TestContext(test_dir, prj, 'date_format_1')
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ctx = context.TestContext(test_dir, prj, 'date_format_1')
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ctx.run(extra=[])
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ctx.run(extra=[])
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@ -1044,7 +1044,7 @@ def test_report_simple_2(test_dir):
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def test_report_edge_1(test_dir):
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def test_report_edge_1(test_dir):
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""" Meassures the PCB size when using a component that contains the real PCB edges #164 """
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""" Measures the PCB size when using a component that contains the real PCB edges #164 """
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prj = 'comp_edge'
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prj = 'comp_edge'
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ctx = context.TestContext(test_dir, prj, 'report_edge_1', POS_DIR)
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ctx = context.TestContext(test_dir, prj, 'report_edge_1', POS_DIR)
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ctx.run()
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ctx.run()
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@ -1055,7 +1055,7 @@ def test_report_edge_1(test_dir):
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@pytest.mark.skipif(context.ki5(), reason="Example in KiCad 6 format")
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@pytest.mark.skipif(context.ki5(), reason="Example in KiCad 6 format")
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def test_report_edge_2(test_dir):
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def test_report_edge_2(test_dir):
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""" Meassures the PCB size when using circles in the PCB edge #375 """
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""" Measures the PCB size when using circles in the PCB edge #375 """
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prj = 'circle_edge'
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prj = 'circle_edge'
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ctx = context.TestContext(test_dir, prj, 'report_edge_1', POS_DIR)
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ctx = context.TestContext(test_dir, prj, 'report_edge_1', POS_DIR)
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ctx.run()
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ctx.run()
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