Added the missing references for KiCad 7
This commit is contained in:
Salvador E. Tropea
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e2cb506094
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../6_0_8/KiCost
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../6_0_8/PCB_Bot.pdf
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../6_0_8/PCB_Bot_def.pdf
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../6_0_8/batteryPack-top_connector.svg
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../6_0_8/bom-F_Cu+F_SilkS.pdf
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../6_0_8/bom-F_Cu+F_SilkS.svg
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../6_0_8/bom_portrait-F_Cu+F_SilkS.svg
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../6_0_8/circle_edge-report.txt
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../6_0_8/comp_edge-report.txt
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../6_0_8/deeper.kicad_sch
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../6_0_8/gencad-gencad.cad
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../6_0_8/glasgow-boardview.brd
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../6_0_8/kibom-variant_3-top-C1.png
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../6_0_8/kibom-variant_3-top.png
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../6_0_8/kibom-variant_3_txt-3D_top.png
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../6_0_8/kibom-variant_3_txt-F_Fab.pdf
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../6_0_8/kibom-variant_4-B_Fab.pdf
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../6_0_8/kibom-variant_4-F_Fab.pdf
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../6_0_8/light_control-diff_pcb.pdf
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../6_0_8/light_control-diff_sch.pdf
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../6_0_8/light_control-only_new.pdf
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# PCB
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Board size: 59.69x48.26 mm (2.35x1.9 inches)
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- This is the size of the rectangle that contains the board
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- Thickness: 1.6 mm (63 mils)
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- Material: FR4 / Kapton
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- Finish: ENIG
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- Layers: 4
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- Copper thickness: 35 µm
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Solder mask: TOP / BOTTOM
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- Color: Top: Blue / Bottom: Red
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Silk screen: TOP / BOTTOM
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- Color: Top: White / Bottom: Black
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Special features:
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- Edge connector: yes, bevelled
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- Castellated pads
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- Edge plating
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Stackup:
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Impedance controlled: YES
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| Name | Type | Color | Thickness | Material | Epsilon_r | Loss tangent |
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|----------------------|----------------------|----------|-----------|-----------------|-----------|--------------|
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| F.SilkS | Top Silk Screen | White | | Liquid Photo | | |
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| F.Paste | Top Solder Paste | | | | | |
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| F.Mask | Top Solder Mask | Blue | 10 | Liquid Ink | 3.3 | 0.000 |
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| F.Cu | copper | | 35 | | | |
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| dielectric 1 | prepreg | | 480 | FR4 | 4.5 | 0.020 |
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| In1.Cu | copper | | 35 | | | |
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| dielectric 2 | core | | 480 | FR4 | 4.5 | 0.020 |
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| In2.Cu | copper | | 35 | | | |
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| dielectric 3 (1/2) | prepreg | | 240 | Kapton | 3.2 | 0.004 |
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| dielectric 3 (2/2) | prepreg | | 240 | Kapton | 3.2 | 0.004 |
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| B.Cu | copper | | 35 | | | |
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| B.Mask | Bottom Solder Mask | Red | 10 | Dry Film | 3.3 | 0.000 |
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| B.Paste | Bottom Solder Paste | | | | | |
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| B.SilkS | Bottom Silk Screen | Black | | Direct Printing | | |
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# Important sizes
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Clearance: 0.15 mm (6 mils)
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Track width: 0.15 mm (6 mils)
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- By design rules: 0.13 mm (5 mils)
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Drill: 0.35 mm (14 mils)
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- Vias: 0.35 mm (14 mils) [Design: 0.3 mm (12 mils)]
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- Pads: 0.7 mm (28 mils)
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- The above values are real drill sizes, they add 0.1 mm (4 mils) to plated holes (PTH)
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Via: 0.51/0.25 mm (20/10 mils)
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- By design rules: 0.46/0.2 mm (18/8 mils)
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- Micro via: unknown [0.2/0.1 mm (8/4 mils)]
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- Burried/blind via: unknown
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Outer Annular Ring: 0.08 mm (3 mils)
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- By design rules: 0.08 mm (3 mils)
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Eurocircuits class: 6D
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- Using min drill 0.25 mm for an OAR of 0.13 mm
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# General stats
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Components count: (SMD/THT)
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- Top: 61/12 (SMD + THT)
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- Bottom: 0/0 (NONE)
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Defined tracks:
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- 0.15 mm (6 mils)
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- 0.3 mm (12 mils)
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- 0.64 mm (25 mils)
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Used tracks:
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- 0.15 mm (6 mils) (276) defined: yes
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- 0.3 mm (12 mils) (11) defined: yes
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- 0.64 mm (25 mils) (175) defined: yes
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Defined vias:
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- 0.51/0.25 mm (20/10 mils)
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- 0.89/0.51 mm (35/20 mils)
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Used vias:
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- 0.51/0.25 mm (20/10 mils) (Count: 23, Aspect: 3.1 A) defined: yes
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- 0.89/0.51 mm (35/20 mils) (Count: 33, Aspect: 1.8 A) defined: yes
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Holes (excluding vias):
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- 0.8 mm (31 mils) (4)
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- 0.85 mm (33 mils) (2)
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- 0.95 mm (37 mils) (3)
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- 1.2 mm (47 mils) (20)
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- 3.2 mm (126 mils) (4)
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Oval holes:
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- 0.6x1.3 mm (24x51 mils) (2)
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Drill tools (including vias and computing adjusts and rounding):
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- 0.35 mm (14 mils) (23)
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- 0.6 mm (24 mils) (33)
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- 0.7 mm (28 mils) (2)
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- 0.9 mm (35 mils) (4)
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- 0.95 mm (37 mils) (2)
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- 1.05 mm (41 mils) (3)
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- 1.3 mm (51 mils) (20)
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- 3.2 mm (126 mils) (4)
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# Schematic
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{ width=16.5cm height=11.7cm }
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# PCB Layers
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{ width=16.5cm height=11.7cm }
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{ width=16.5cm height=11.7cm }
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# PCB
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Board size: 59.69x48.26 mm (2.35x1.9 inches)
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- This is the size of the rectangle that contains the board
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- Thickness: 1.6 mm (63 mils)
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- Material: FR4 / Kapton
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- Finish: ENIG
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- Layers: 4
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- Copper thickness: 35 µm
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Solder mask: TOP / BOTTOM
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- Color: Top: Blue / Bottom: Red
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Silk screen: TOP / BOTTOM
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- Color: Top: White / Bottom: Black
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Special features:
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- Edge connector: yes, bevelled
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- Castellated pads
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- Edge plating
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Stackup:
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Impedance controlled: YES
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| Name | Type | Color | Thickness | Material | Epsilon_r | Loss tangent |
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|----------------------|----------------------|----------|-----------|-----------------|-----------|--------------|
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| F.SilkS | Top Silk Screen | White | | Liquid Photo | | |
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| F.Paste | Top Solder Paste | | | | | |
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| F.Mask | Top Solder Mask | Blue | 10 | Liquid Ink | 3.3 | 0.000 |
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| F.Cu | copper | | 35 | | | |
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| dielectric 1 | prepreg | | 480 | FR4 | 4.5 | 0.020 |
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| In1.Cu | copper | | 35 | | | |
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| dielectric 2 | core | | 480 | FR4 | 4.5 | 0.020 |
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| In2.Cu | copper | | 35 | | | |
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| dielectric 3 (1/2) | prepreg | | 240 | Kapton | 3.2 | 0.004 |
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| dielectric 3 (2/2) | prepreg | | 240 | Kapton | 3.2 | 0.004 |
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| B.Cu | copper | | 35 | | | |
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| B.Mask | Bottom Solder Mask | Red | 10 | Dry Film | 3.3 | 0.000 |
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| B.Paste | Bottom Solder Paste | | | | | |
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| B.SilkS | Bottom Silk Screen | Black | | Direct Printing | | |
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# Important sizes
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Clearance: 0.15 mm (6 mils)
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Track width: 0.15 mm (6 mils)
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- By design rules: 0.13 mm (5 mils)
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Drill: 0.35 mm (14 mils)
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- Vias: 0.35 mm (14 mils) [Design: 0.3 mm (12 mils)]
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- Pads: 0.7 mm (28 mils)
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- The above values are real drill sizes, they add 0.1 mm (4 mils) to plated holes (PTH)
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Via: 0.51/0.25 mm (20/10 mils)
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- By design rules: 0.46/0.2 mm (18/8 mils)
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- Micro via: unknown [0.2/0.1 mm (8/4 mils)]
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- Burried/blind via: unknown
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Outer Annular Ring: 0.08 mm (3 mils)
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- By design rules: 0.08 mm (3 mils)
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Eurocircuits class: 6D
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- Using min drill 0.25 mm for an OAR of 0.13 mm
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# General stats
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Components count: (SMD/THT)
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- Top: 61/12 (SMD + THT)
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- Bottom: 0/0 (NONE)
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Defined tracks:
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- 0.15 mm (6 mils)
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- 0.3 mm (12 mils)
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- 0.64 mm (25 mils)
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Used tracks:
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- 0.15 mm (6 mils) (276) defined: yes
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- 0.3 mm (12 mils) (11) defined: yes
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- 0.64 mm (25 mils) (175) defined: yes
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Defined vias:
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- 0.51/0.25 mm (20/10 mils)
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- 0.89/0.51 mm (35/20 mils)
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Used vias:
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- 0.51/0.25 mm (20/10 mils) (Count: 23, Aspect: 3.1 A) defined: yes
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- 0.89/0.51 mm (35/20 mils) (Count: 33, Aspect: 1.8 A) defined: yes
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Holes (excluding vias):
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- 0.8 mm (31 mils) (4)
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- 0.85 mm (33 mils) (2)
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- 0.95 mm (37 mils) (3)
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- 1.2 mm (47 mils) (20)
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- 3.2 mm (126 mils) (4)
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Oval holes:
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- 0.6x1.3 mm (24x51 mils) (2)
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Drill tools (including vias and computing adjusts and rounding):
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- 0.35 mm (14 mils) (23)
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- 0.6 mm (24 mils) (33)
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- 0.7 mm (28 mils) (2)
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- 0.9 mm (35 mils) (4)
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- 0.95 mm (37 mils) (2)
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- 1.05 mm (41 mils) (3)
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- 1.3 mm (51 mils) (20)
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- 3.2 mm (126 mils) (4)
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# Schematic
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{ width=16.5cm height=11.7cm }
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# PCB Layers
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{ width=16.5cm height=11.7cm }
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{ width=16.5cm height=11.7cm }
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../6_0_8/light_control-report_simple.txt
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../6_0_8/light_control.XYRS
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../6_0_8/light_control_bom_jlc.csv
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../6_0_8/light_control_cpl_jlc.csv
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../6_0_8/light_control_cpl_jlc_aux.csv
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../6_0_8/light_control_cpl_jlc_nc.csv
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../6_0_8/light_control_diff-diff_sch.pdf
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../6_0_8/print_multizone-assembly_page_01.png
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../6_0_8/print_multizone-assembly_page_02.png
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../6_0_8/sub-sheet.kicad_sch
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../6_0_8/subparts-bom.csv
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../6_0_8/test_v5-schematic_(no_L).pdf
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../6_0_8/test_v5-schematic_(no_L).svg
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../6_0_8/test_v5.kicad_sch
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../6_0_8/test_v5_wks-schematic_(no_L).pdf
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