Now the default output name applies to the DRC and ERC report names.
This provides more coherent file names.
This commit is contained in:
parent
b2594ec8d3
commit
e0ab45e95d
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@ -11,6 +11,11 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Internal BoM: `no_conflict` option to exclude fields from conflict detection.
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- Support for KICAD_CONFIG_HOME defined from inside KiCad
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### Changed
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- Now the default output name applies to the DRC and ERC report names.
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This provides more coherent file names.
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## [0.9.0] - 2021-01-04
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### Added
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- iBoM output: file name patterns are allowed for the `netlist_file` option.
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@ -109,7 +109,9 @@ This section is used to specify tasks that will be executed before generating an
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- *regexp*: Alias for regex.
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- ignore_unconnected: [boolean=false] Option for `run_drc`. Ignores the unconnected nets. Useful if you didn't finish the routing.
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- run_drc: [boolean=false] Runs the DRC (Distance Rules Check). To ensure we have a valid PCB.
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The report file name is controlled by the global output pattern (%i=drc %x=txt).
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- run_erc: [boolean=false] Runs the ERC (Electrical Rules Check). To ensure the schematic is electrically correct.
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The report file name is controlled by the global output pattern (%i=erc %x=txt).
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- update_xml: [boolean=false] Update the XML version of the BoM (Bill of Materials).
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To ensure our generated BoM is up to date.
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Note that this isn't needed when using the internal BoM generator (`bom`).
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@ -16,8 +16,10 @@ preflight:
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# [boolean=false] Option for `run_drc`. Ignores the unconnected nets. Useful if you didn't finish the routing.
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ignore_unconnected: false
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# [boolean=false] Runs the DRC (Distance Rules Check). To ensure we have a valid PCB.
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# The report file name is controlled by the global output pattern (%i=drc %x=txt).
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run_drc: true
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# [boolean=false] Runs the ERC (Electrical Rules Check). To ensure the schematic is electrically correct.
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# The report file name is controlled by the global output pattern (%i=erc %x=txt).
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run_erc: true
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# [boolean=false] Update the XML version of the BoM (Bill of Materials).
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# To ensure our generated BoM is up to date.
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@ -1,6 +1,6 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020 Salvador E. Tropea
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# Copyright (c) 2020 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2018 John Beard
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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@ -108,7 +108,7 @@ def check_script(cmd, url, version=None):
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def check_eeschema_do():
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check_script(CMD_EESCHEMA_DO, URL_EESCHEMA_DO, '1.4.0')
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check_script(CMD_EESCHEMA_DO, URL_EESCHEMA_DO, '1.5.4')
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def exec_with_retry(cmd):
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@ -1,6 +1,6 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020 Salvador E. Tropea
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# Copyright (c) 2020 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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""" Base class for output options """
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@ -199,7 +199,7 @@ class Optionable(object):
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name = name.replace('%p', GS.pcb_title)
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name = name.replace('%r', GS.pcb_rev)
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name = name.replace('%T', GS.time)
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name = name.replace('%v', self._find_variant())
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name = name.replace('%v', self._find_variant() if self else '')
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name = name.replace('%x', ext)
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# sanitize the name to avoid characters illegal in file systems
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name = name.replace('\\', '/')
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@ -221,7 +221,7 @@ class Optionable(object):
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name = name.replace('%p', GS.sch_title)
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name = name.replace('%r', GS.sch_rev)
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name = name.replace('%T', GS.time)
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name = name.replace('%v', self._find_variant())
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name = name.replace('%v', self._find_variant() if self else '')
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name = name.replace('%x', ext)
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# sanitize the name to avoid characters illegal in file systems
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name = name.replace('\\', '/')
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@ -1,13 +1,14 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020 Salvador E. Tropea
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# Copyright (c) 2020 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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from sys import (exit)
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from .macros import macros, pre_class # noqa: F401
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from .error import (KiPlotConfigurationError)
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from .gs import (GS)
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from .kiplot import check_script, exec_with_retry
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from .optionable import Optionable
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from .kiplot import check_script, exec_with_retry, load_board
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from .misc import (CMD_PCBNEW_RUN_DRC, URL_PCBNEW_RUN_DRC, DRC_ERROR)
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from .log import (get_logger)
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@ -16,7 +17,8 @@ logger = get_logger(__name__)
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@pre_class
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class Run_DRC(BasePreFlight): # noqa: F821
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""" [boolean=false] Runs the DRC (Distance Rules Check). To ensure we have a valid PCB """
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""" [boolean=false] Runs the DRC (Distance Rules Check). To ensure we have a valid PCB.
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The report file name is controlled by the global output pattern (%i=drc %x=txt) """
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def __init__(self, name, value):
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super().__init__(name, value)
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if not isinstance(value, bool):
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@ -26,7 +28,11 @@ class Run_DRC(BasePreFlight): # noqa: F821
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def run(self):
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check_script(CMD_PCBNEW_RUN_DRC, URL_PCBNEW_RUN_DRC, '1.4.0')
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cmd = [CMD_PCBNEW_RUN_DRC, 'run_drc']
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if GS.board is None:
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load_board()
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output = Optionable.expand_filename(None, GS.out_dir, GS.def_global_output, 'drc', 'txt')
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logger.debug('DRC report: '+output)
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cmd = [CMD_PCBNEW_RUN_DRC, 'run_drc', '-o', output]
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if GS.filter_file:
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cmd.extend(['-f', GS.filter_file])
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if BasePreFlight.get_option('ignore_unconnected'): # noqa: F821
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@ -1,11 +1,12 @@
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# -*- coding: utf-8 -*-
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# Copyright (c) 2020 Salvador E. Tropea
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# Copyright (c) 2020 Instituto Nacional de Tecnología Industrial
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# Copyright (c) 2020-2021 Salvador E. Tropea
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# Copyright (c) 2020-2021 Instituto Nacional de Tecnología Industrial
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# License: GPL-3.0
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# Project: KiBot (formerly KiPlot)
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from sys import (exit)
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from .macros import macros, pre_class # noqa: F401
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from .gs import (GS)
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from .optionable import Optionable
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from .kiplot import check_eeschema_do, exec_with_retry
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from .error import (KiPlotConfigurationError)
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from .misc import (CMD_EESCHEMA_DO, ERC_ERROR)
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@ -16,7 +17,8 @@ logger = get_logger(__name__)
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@pre_class
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class Run_ERC(BasePreFlight): # noqa: F821
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""" [boolean=false] Runs the ERC (Electrical Rules Check). To ensure the schematic is electrically correct """
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""" [boolean=false] Runs the ERC (Electrical Rules Check). To ensure the schematic is electrically correct.
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The report file name is controlled by the global output pattern (%i=erc %x=txt) """
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def __init__(self, name, value):
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super().__init__(name, value)
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if not isinstance(value, bool):
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@ -26,7 +28,9 @@ class Run_ERC(BasePreFlight): # noqa: F821
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def run(self):
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check_eeschema_do()
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cmd = [CMD_EESCHEMA_DO, 'run_erc']
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output = Optionable.expand_filename_sch(None, GS.out_dir, GS.def_global_output, 'erc', 'txt')
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logger.debug('ERC report: '+output)
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cmd = [CMD_EESCHEMA_DO, 'run_erc', '-o', output]
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if GS.filter_file:
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cmd.extend(['-f', GS.filter_file])
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cmd.extend([GS.sch_file, GS.out_dir])
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@ -23,7 +23,7 @@ if prev_dir not in sys.path:
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sys.path.insert(0, prev_dir)
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# Utils import
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from utils import context
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from kibot.misc import (DRC_ERROR, ERC_ERROR, BOM_ERROR)
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from kibot.misc import (DRC_ERROR, ERC_ERROR, BOM_ERROR, CORRUPTED_PCB)
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def test_erc_1():
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@ -31,7 +31,7 @@ def test_erc_1():
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ctx = context.TestContext('ERC', prj, 'erc', '')
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ctx.run()
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# Check all outputs are there
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ctx.expect_out_file(prj+'.erc')
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ctx.expect_out_file(prj+'-erc.txt')
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ctx.clean_up()
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@ -41,7 +41,7 @@ def test_erc_fail_1():
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ctx = context.TestContext('ERCFail1', prj, 'erc', '')
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ctx.run(ERC_ERROR)
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# Check all outputs are there
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ctx.expect_out_file(prj+'.erc')
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ctx.expect_out_file(prj+'-erc.txt')
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ctx.clean_up()
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@ -58,7 +58,7 @@ def test_drc_1():
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ctx = context.TestContext('DRC', prj, 'drc', '')
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ctx.run()
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# Check all outputs are there
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ctx.expect_out_file('drc_result.rpt')
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ctx.expect_out_file(prj+'-drc.txt')
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ctx.clean_up()
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@ -67,7 +67,7 @@ def test_drc_filter():
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ctx = context.TestContext('DRC_Filter', prj, 'drc_filter', '')
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ctx.run()
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# Check all outputs are there
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ctx.expect_out_file('drc_result.rpt')
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ctx.expect_out_file(prj+'-drc.txt')
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ctx.expect_out_file('kibot_errors.filter')
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ctx.clean_up()
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@ -78,7 +78,7 @@ def test_drc_unco():
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ctx = context.TestContext('DRCUnco', prj, 'drc_unco', '')
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ctx.run()
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# Check all outputs are there
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ctx.expect_out_file('drc_result.rpt')
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ctx.expect_out_file(prj+'-drc.txt')
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ctx.clean_up()
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@ -88,7 +88,7 @@ def test_drc_error():
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ctx = context.TestContext('DRCError', prj, 'drc', '')
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ctx.run(DRC_ERROR)
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# Check all outputs are there
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ctx.expect_out_file('drc_result.rpt')
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ctx.expect_out_file(prj+'-drc.txt')
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ctx.clean_up()
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@ -96,7 +96,7 @@ def test_drc_fail():
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""" Check we dummy PCB """
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prj = 'bom_no_xml'
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ctx = context.TestContext('DRCFail', prj, 'drc', '')
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ctx.run(DRC_ERROR)
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ctx.run(CORRUPTED_PCB)
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ctx.clean_up()
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