diff --git a/tests/reference/5_1_6/light_control-report.txt_2 b/tests/reference/5_1_6/light_control-report.txt_2
new file mode 100644
index 00000000..c4d3eba9
--- /dev/null
+++ b/tests/reference/5_1_6/light_control-report.txt_2
@@ -0,0 +1,98 @@
+# PCB
+
+Board size: 59.69x48.26 mm (2.35x1.9 inches)
+
+- This is the size of the rectangle that contains the board
+- Thickness: 1.6 mm (63 mils)
+- Material: FR4
+- Finish: ENIG
+- Layers: 4
+- Copper thickness: 35 µm
+
+Solder mask: TOP / BOTTOM
+
+- Color: Top: Blue / Bottom: Red
+
+Silk screen: TOP / BOTTOM
+
+- Color: White
+
+
+# Important sizes
+
+Clearance: 0.15 mm (6 mils)
+
+Track width: 0.15 mm (6 mils)
+
+- By design rules: 0.13 mm (5 mils)
+
+Drill: 0.25 mm (10 mils)
+
+- Vias: 0.25 mm (10 mils) [Design: 0.2 mm (8 mils)]
+- Pads: 0.6 mm (24 mils)
+
+Via: 0.51/0.25 mm (20/10 mils)
+
+- By design rules: 0.46/0.2 mm (18/8 mils)
+- Micro via: no [0.2/0.1 mm (8/4 mils)]
+- Burried/blind via: no
+
+Outer Annular Ring: 0.25 mm (10 mils)
+
+- By design rules: 0.25 mm (10 mils)
+
+Eurocircuits class: 6D
+
+
+# General stats
+
+Components count: (SMD/THT)
+
+- Top: 61/12 (SMD + THT)
+- Bottom: 0/0 (NONE)
+
+Defined tracks:
+
+- 0.15 mm (6 mils)
+- 0.15 mm (6 mils)
+- 0.3 mm (12 mils)
+- 0.64 mm (25 mils)
+
+Used tracks:
+
+- 0.15 mm (6 mils) (276) defined: yes
+- 0.3 mm (12 mils) (11) defined: yes
+- 0.64 mm (25 mils) (175) defined: yes
+
+Defined vias:
+
+- 0.51/0.25 mm (20/10 mils)
+- 0.51/0.25 mm (20/10 mils)
+- 0.89/0.51 mm (35/20 mils)
+
+Used vias:
+
+- 0.51/0.25 mm (20/10 mils) (Count: 23, Aspect: 3.1 A) defined: yes
+- 0.89/0.51 mm (35/20 mils) (Count: 33, Aspect: 1.8 A) defined: yes
+
+Holes (excluding vias):
+
+- 0.8 mm (31 mils) (4)
+- 0.85 mm (33 mils) (2)
+- 0.95 mm (37 mils) (3)
+- 1.2 mm (47 mils) (20)
+- 3.2 mm (126 mils) (4)
+
+
+# Schematic
+
+![Schematic](Schematic.svg){ width=16.5cm height=11.7cm }
+
+
+
+# PCB Layers
+
+![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm }
+
+![Bottom copper and silkscreen](Layers/light_control-B_Cu+B_SilkS.svg){ width=16.5cm height=11.7cm }
+
diff --git a/tests/reference/5_1_7/light_control-report.txt_2 b/tests/reference/5_1_7/light_control-report.txt_2
new file mode 120000
index 00000000..5a78047b
--- /dev/null
+++ b/tests/reference/5_1_7/light_control-report.txt_2
@@ -0,0 +1 @@
+../5_1_6/light_control-report.txt_2
\ No newline at end of file
diff --git a/tests/reference/6_0_2/light_control-report.txt_2 b/tests/reference/6_0_2/light_control-report.txt_2
new file mode 120000
index 00000000..6fcf20ac
--- /dev/null
+++ b/tests/reference/6_0_2/light_control-report.txt_2
@@ -0,0 +1 @@
+light_control-report.txt
\ No newline at end of file
diff --git a/tests/test_plot/test_misc.py b/tests/test_plot/test_misc.py
index 8e51ac29..23ae3864 100644
--- a/tests/test_plot/test_misc.py
+++ b/tests/test_plot/test_misc.py
@@ -1011,7 +1011,7 @@ def test_report_simple_2(test_dir):
     ctx.run()
     ctx.expect_out_file(prj+'-report.txt')
     ctx.expect_out_file(prj+'-report_simple.txt')
-    ctx.compare_txt(prj+'-report.txt')
+    ctx.compare_txt(prj+'-report.txt', prj+'-report.txt_2')
     ctx.compare_txt(prj+'-report_simple.txt')
     ctx.expect_out_file(prj+'-report.pdf')
     ctx.clean_up(keep_project=True)