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(id 0) (at 0 2.54 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "Cable_2" (id 1) (at 0 -2.54 0) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "" (id 2) (at 0 0 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" "" (id 3) (at 0 0 0) + (effects (font (size 1.27 1.27)) hide) + ) + (symbol "Cable_2_0_1" + (polyline + (pts + (xy -7.62 -1.27) + (xy 7.62 -1.27) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + (polyline + (pts + (xy -7.62 1.27) + (xy 7.62 1.27) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + ) + (symbol "Cable_2_1_1" + (pin passive line (at -10.16 1.27 0) (length 2.54) + (name "A1" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + (pin passive line (at -10.16 -1.27 0) (length 2.54) + (name "A2" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + (pin passive line (at 10.16 1.27 180) (length 2.54) + (name "B1" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + (pin passive line (at 10.16 -1.27 180) (length 2.54) + (name "B2" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + ) + ) + (symbol "Housing_2" (pin_numbers hide) (pin_names hide) (in_bom yes) (on_board yes) + (property "Reference" "H?" (id 0) (at 0 7.62 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "Housing_2" (id 1) (at 0 -6.35 0) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "" (id 2) (at 0 0 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" "https://www.molex.com/pdm_docs/sd/022012027_sd.pdf" (id 3) (at 0 -15.24 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "manf#" "0022012027" (id 4) (at 0 -11.43 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "manf" "Molex" (id 5) (at -1.27 -8.89 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "digikey#" "WM2011-ND" (id 6) (at -1.27 -13.97 0) + (effects (font (size 1.27 1.27)) hide) + ) + (symbol "Housing_2_0_1" + (polyline + (pts + (xy -1.27 -5.08) + (xy -1.27 -1.27) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + (polyline + (pts + (xy 1.27 -5.08) + (xy 1.27 -1.27) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + (polyline + (pts + (xy -2.54 6.35) + (xy 2.54 6.35) + (xy 2.54 -5.08) + (xy -2.54 -5.08) + (xy -2.54 6.35) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + ) + ) + (symbol "Terminal" (pin_numbers hide) (pin_names hide) (in_bom yes) (on_board yes) + (property "Reference" "TM?" (id 0) (at 0 2.54 0) + (effects (font (size 1.27 1.27))) + ) + (property "Value" "Terminal" (id 1) (at 0 -2.54 0) + (effects (font (size 1.27 1.27))) + ) + (property "Footprint" "" (id 2) (at 0 0 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "Datasheet" "https://www.molex.com/pdm_docs/sd/008550102_sd.pdf" (id 3) (at -2.54 -12.7 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "digikey#" "WM2312-ND" (id 4) (at 0 -10.16 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "manf" "Molex" (id 5) (at 0 -5.08 0) + (effects (font (size 1.27 1.27)) hide) + ) + (property "manf#" "0008550102" (id 6) (at 0 -7.62 0) + (effects (font (size 1.27 1.27)) hide) + ) + (symbol "Terminal_0_1" + (polyline + (pts + (xy -2.54 1.27) + (xy -2.54 -1.27) + (xy 2.54 0) + (xy -2.54 1.27) + ) + (stroke (width 0.1524) (type default) (color 0 0 0 0)) + (fill (type none)) + ) + ) + (symbol "Terminal_1_1" + (pin passive line (at -5.08 0 0) (length 2.54) + (name "1" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + (pin passive line (at 5.08 0 180) (length 2.54) + (name "2" (effects (font (size 1.27 1.27)))) + (number "" (effects (font (size 1.27 1.27)))) + ) + ) + ) +) diff --git a/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pcb b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pcb new file mode 100644 index 00000000..28b47a11 --- /dev/null +++ b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pcb @@ -0,0 +1,2 @@ +(kicad_pcb (version 20211014) (generator pcbnew) +) \ No newline at end of file diff --git a/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pro b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pro new file mode 100644 index 00000000..603e0703 --- /dev/null +++ b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/Top_Level.kicad_pro @@ -0,0 +1,334 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.1, + 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"Connector_Molex:Molex_KK-254_AE-6410-02A_1x02_P2.54mm_Vertical") + ) + (path "/1915c359-c3f3-4d3d-9201-50272cf57a7c/7ab91663-c6d6-4865-af4d-58f15d17bea5" + (reference "R1") (unit 1) (value "1k") (footprint "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal") + ) + (path "/eb9bfe27-f26e-461b-be25-bc92a359b8c5/56f140e5-f5a6-453d-90e1-453a9c49ca4b" + (reference "R101") (unit 1) (value "1k") (footprint "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P7.62mm_Horizontal") + ) + (path "/1c764dd3-15f0-49cc-ac13-a43328b39f38" + (reference "TM1001") (unit 1) (value "0008550102") (footprint "") + ) + (path "/db90f2dc-75bd-4e73-adc6-3e0030758619" + (reference "TM1002") (unit 1) (value "0008550102") (footprint "") + ) + (path "/8d1d5762-eadf-4e23-a39f-2ae093ce4370" + (reference "TM1003") (unit 1) (value "0008550102") (footprint "") + ) + (path "/42f7e00e-88e0-4402-b679-ddddc58e5306" + (reference "TM1004") (unit 1) (value "0008550102") (footprint "") + ) + (path "/f92c5a10-1873-4b33-ae54-426a1fa599bd" + (reference "W1001") (unit 1) (value "Cable_2") (footprint "") + ) + ) +) diff --git a/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/simple.kibot.yaml b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/simple.kibot.yaml new file mode 100644 index 00000000..62b1a003 --- /dev/null +++ b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/simple.kibot.yaml @@ -0,0 +1,9 @@ +# Example KiBot config file +kibot: + version: 1 + +preflight: + run_erc: true + +import: + - file: ../../../print_sch_svg.kibot.yaml diff --git a/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/sym-lib-table b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/sym-lib-table new file mode 100644 index 00000000..e7f86402 --- /dev/null +++ b/docs/1_SCH_2_part_PCBs/Hierarchy_1/Top_Level_C/sym-lib-table @@ -0,0 +1,3 @@ +(sym_lib_table + (lib (name "Syms")(type "KiCad")(uri "${KIPRJMOD}/Syms.kicad_sym")(options "")(descr "")) +) diff --git a/docs/1_SCH_2_part_PCBs/README.md b/docs/1_SCH_2_part_PCBs/README.md index 6eeb2db7..b6c78840 100644 --- a/docs/1_SCH_2_part_PCBs/README.md +++ b/docs/1_SCH_2_part_PCBs/README.md @@ -106,3 +106,18 @@ Now the top-level looks like this: ![Schematic](Hierarchy_1/Top_Level_B/Generated/Schematic.svg) And the ERC works. + + + +## Solution 3: Using hierarchical sheets C + +This option doesn't allow a full ERC check of the system, you won't detect the +output of one board connected to the output of another. But it allows creating +BoMs that includes things like wires, terminals and crimp housings. + +Here the connection between boards is done using components for each element we +need to use: + +![Schematic](Hierarchy_1/Top_Level_C/Generated/Schematic.svg) + +The ERC works, but is limited.