diff --git a/kibot/out_pcb_print.py b/kibot/out_pcb_print.py index ff3a69ff..c0a7c436 100644 --- a/kibot/out_pcb_print.py +++ b/kibot/out_pcb_print.py @@ -40,8 +40,11 @@ def to_gray(color): return (avg, avg, avg) -def colorize_pdf(folder, in_file, out_file, color): +def colorize_pdf(folder, in_file, out_file, color, black_holes): er = None + pdf_color = [PyPDF2.generic.FloatObject(color[0]), PyPDF2.generic.FloatObject(color[1]), + PyPDF2.generic.FloatObject(color[2])] + black_color = [PyPDF2.generic.FloatObject(0), PyPDF2.generic.FloatObject(0), PyPDF2.generic.FloatObject(0)] try: with open(os.path.join(folder, in_file), "rb") as f: source = PyPDF2.PdfFileReader(f, "rb") @@ -50,16 +53,14 @@ def colorize_pdf(folder, in_file, out_file, color): page = source.getPage(page) content_object = page["/Contents"].getObject() content = PyPDF2.pdf.ContentStream(content_object, source) - i = 0 - for operands, operator in content.operations: - if operator == PyPDF2.utils.b_("rg") or operator == PyPDF2.utils.b_("RG"): + for i, (operands, operator) in enumerate(content.operations): + if operator == b"rg" or operator == b"RG": if operands == [0, 0, 0]: - content.operations[i][0] - content.operations[i] = ([PyPDF2.generic.FloatObject(color[0]), - PyPDF2.generic.FloatObject(color[1]), - PyPDF2.generic.FloatObject(color[2])], - content.operations[i][1]) - i = i+1 + # Replace black by the selected color + content.operations[i] = (pdf_color, operator) + elif black_holes and operands == [1, 1, 1]: + # Replace white by black + content.operations[i] = (black_color, operator) page.__setitem__(PyPDF2.generic.NameObject('/Contents'), content) output.addPage(page) try: @@ -152,14 +153,14 @@ def create_pdf_from_pages(input_folder, input_files, output_fn): f.close() -def colorize_layer(suffix, color, monochrome, filelist, temp_dir): +def colorize_layer(suffix, color, monochrome, filelist, temp_dir, black_holes=False): in_file = GS.pcb_basename+"-"+suffix+".pdf" if color != "#000000": out_file = GS.pcb_basename+"-"+suffix+"-colored.pdf" logger.debug('- Giving color to {} -> {} ({})'.format(in_file, out_file, color)) rgb, alpha = hex_to_rgb(color) color = rgb if not monochrome else to_gray(rgb) - colorize_pdf(temp_dir, in_file, out_file, color) + colorize_pdf(temp_dir, in_file, out_file, color, black_holes) filelist.append(out_file) else: filelist.append(in_file) @@ -213,6 +214,8 @@ class PagesOptions(Optionable): """ Do not plot the component pads in the silk screen (KiCad 5.x only) """ self.tent_vias = True """ Cover the vias """ + self.black_holes = True + """ Change the drill holes to be black instead of white """ self.layers = LayerOptions """ [list(dict)] List of layers printed in this page. Order is important, the last goes on top """ @@ -245,7 +248,7 @@ class PCB_PrintOptions(VariantOptions): To use the KiCad 6 default colors select `_builtin_default`. Usually user colors are stored as `user`, but you can give it another name """ self.plot_sheet_reference = True - """ Include the title-block """ + """ Include the title-block. Only available on KiCad 6. """ self.pages = PagesOptions """ [list(dict)] List of pages to include in the output document. Each page contains one or more layers of the PCB """ @@ -339,11 +342,13 @@ class PCB_PrintOptions(VariantOptions): pc.SetLayer(id) pc.OpenPlotfile(la.suffix, PLOT_FORMAT_PDF, p.sheet) pc.PlotLayer() - # 2) Plot the frame using an empry layer and 1.0 scale - if self.plot_sheet_reference: + # 2) Plot the frame using an empty layer and 1.0 scale + if self.plot_sheet_reference and GS.ki6(): logger.debug('- Plotting the frame') po.SetPlotFrameRef(True) po.SetScale(1.0) + po.SetNegative(False) + # TODO: Any better option? pc.SetLayer(GS.board.GetLayerID(GS.work_layer)) pc.OpenPlotfile('frame', PLOT_FORMAT_PDF, p.sheet) pc.PlotLayer() @@ -351,9 +356,9 @@ class PCB_PrintOptions(VariantOptions): # 3) Apply the colors to the layer PDFs filelist = [] for la in p.layers: - colorize_layer(la.suffix, la.color, p.monochrome, filelist, temp_dir) + colorize_layer(la.suffix, la.color, p.monochrome, filelist, temp_dir, p.black_holes) # 4) Apply color to the frame - if self.plot_sheet_reference: + if self.plot_sheet_reference and GS.ki6(): color = p.sheet_reference_color if p.sheet_reference_color else self._color_theme.pcb_frame colorize_layer('frame', color, p.monochrome, filelist, temp_dir) # 5) Stack all layers in one file @@ -378,7 +383,8 @@ class PCB_PrintOptions(VariantOptions): @output_class class PCB_Print(BaseOutput): # noqa: F821 """ PCB Print - Prints the PCB using a mechanism that is more flexible than `pdf_pcb_print`. """ + Prints the PCB using a mechanism that is more flexible than `pdf_pcb_print`. + Note that it doesn't support the frame/title block for KiCad 5. """ def __init__(self): super().__init__() with document: diff --git a/kibot/out_report.py b/kibot/out_report.py index e58cbe4a..7b08819f 100644 --- a/kibot/out_report.py +++ b/kibot/out_report.py @@ -654,7 +654,7 @@ class ReportOptions(BaseOptions): self._schematic_svgs = [] for o in RegOutput.get_outputs(): dest = None - if o.type == 'pdf_pcb_print': + if o.type == 'pdf_pcb_print' or o.type == 'pcb_print': dest = self._layer_pdfs elif o.type == 'svg_pcb_print': dest = self._layer_svgs diff --git a/kibot/report_templates/report_full.txt b/kibot/report_templates/report_full.txt index 4dd52f89..600b4fd7 100644 --- a/kibot/report_templates/report_full.txt +++ b/kibot/report_templates/report_full.txt @@ -106,9 +106,9 @@ Holes (excluding vias): #schematic_svgs:![${comment}](${path}){ width=16.5cm height=11.7cm }${new_line} -#?layer_svgs +#?layer_pdfs # PCB Layers -#?layer_svgs +#?layer_pdfs -#?layer_svgs -#layer_svgs:![${comment}](${path}){ width=16.5cm height=11.7cm }${new_line} +#?layer_pdfs +#layer_pdfs:![${comment}](${path}){ width=16.5cm height=11.7cm }${new_line} diff --git a/kibot/report_templates/report_simple.txt b/kibot/report_templates/report_simple.txt index a3cb8aab..d35a0e34 100644 --- a/kibot/report_templates/report_simple.txt +++ b/kibot/report_templates/report_simple.txt @@ -62,7 +62,3 @@ Marking: Other markings: - ROHS / UL / Date - Yes if available - -PCB: - -#layer_svg:![${comment_print_front}](${path_print_front}){ width=16.5cm height=11.7cm } diff --git a/tests/board_samples/kicad_6/light_control.kicad_prl b/tests/board_samples/kicad_6/light_control.kicad_prl index dfd2b5f0..eb047548 100644 --- a/tests/board_samples/kicad_6/light_control.kicad_prl +++ b/tests/board_samples/kicad_6/light_control.kicad_prl @@ -1,6 +1,6 @@ { "board": { - "active_layer": 0, + "active_layer": 1, "active_layer_preset": "", "auto_track_width": true, "hidden_nets": [], diff --git a/tests/reference/5_1_6/light_control-report.txt b/tests/reference/5_1_6/light_control-report.txt index 908a142c..db19f79b 100644 --- a/tests/reference/5_1_6/light_control-report.txt +++ b/tests/reference/5_1_6/light_control-report.txt @@ -92,7 +92,6 @@ Holes (excluding vias): # PCB Layers -![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm } - -![Bottom copper and silkscreen](Layers/light_control-B_Cu+B_SilkS.svg){ width=16.5cm height=11.7cm } +![Top copper and silkscreen](Layers/light_control-assembly-front.pdf){ width=16.5cm height=11.7cm } +![Bottom copper and silkscreen](Layers/light_control-assembly-bottom.pdf){ width=16.5cm height=11.7cm } diff --git a/tests/reference/5_1_6/light_control-report.txt_2 b/tests/reference/5_1_6/light_control-report.txt_2 index c4d3eba9..c96106e2 100644 --- a/tests/reference/5_1_6/light_control-report.txt_2 +++ b/tests/reference/5_1_6/light_control-report.txt_2 @@ -54,7 +54,7 @@ Components count: (SMD/THT) Defined tracks: - 0.15 mm (6 mils) -- 0.15 mm (6 mils) +- 0.25 mm (10 mils) - 0.3 mm (12 mils) - 0.64 mm (25 mils) @@ -67,7 +67,7 @@ Used tracks: Defined vias: - 0.51/0.25 mm (20/10 mils) -- 0.51/0.25 mm (20/10 mils) +- 0.8/0.4 mm (31/16 mils) - 0.89/0.51 mm (35/20 mils) Used vias: @@ -92,7 +92,7 @@ Holes (excluding vias): # PCB Layers -![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm } +![Top copper and silkscreen](Layers/light_control-assembly-front.pdf){ width=16.5cm height=11.7cm } -![Bottom copper and silkscreen](Layers/light_control-B_Cu+B_SilkS.svg){ width=16.5cm height=11.7cm } +![Bottom copper and silkscreen](Layers/light_control-assembly-bottom.pdf){ width=16.5cm height=11.7cm } diff --git a/tests/reference/5_1_6/light_control-report_simple.txt b/tests/reference/5_1_6/light_control-report_simple.txt index 8c53419e..f37d9efa 100644 --- a/tests/reference/5_1_6/light_control-report_simple.txt +++ b/tests/reference/5_1_6/light_control-report_simple.txt @@ -36,7 +36,3 @@ Marking: Other markings: - ROHS / UL / Date - Yes if available - -PCB: - -![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm } diff --git a/tests/reference/6_0_4/light_control-report.txt b/tests/reference/6_0_4/light_control-report.txt index b525b28a..f59a02a3 100644 --- a/tests/reference/6_0_4/light_control-report.txt +++ b/tests/reference/6_0_4/light_control-report.txt @@ -115,7 +115,7 @@ Holes (excluding vias): # PCB Layers -![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm } +![Top copper and silkscreen](Layers/light_control-assembly-front.pdf){ width=16.5cm height=11.7cm } -![Bottom copper and silkscreen](Layers/light_control-B_Cu+B_SilkS.svg){ width=16.5cm height=11.7cm } +![Bottom copper and silkscreen](Layers/light_control-assembly-bottom.pdf){ width=16.5cm height=11.7cm } diff --git a/tests/reference/6_0_4/light_control-report_simple.txt b/tests/reference/6_0_4/light_control-report_simple.txt index 5132c025..6645d369 100644 --- a/tests/reference/6_0_4/light_control-report_simple.txt +++ b/tests/reference/6_0_4/light_control-report_simple.txt @@ -61,7 +61,3 @@ Marking: Other markings: - ROHS / UL / Date - Yes if available - -PCB: - -![Top copper and silkscreen](Layers/light_control-F_Cu+F_SilkS.svg){ width=16.5cm height=11.7cm } diff --git a/tests/yaml_samples/pcb_print.kibot.yaml b/tests/yaml_samples/pcb_print.kibot.yaml index 9d293408..1a1a374e 100644 --- a/tests/yaml_samples/pcb_print.kibot.yaml +++ b/tests/yaml_samples/pcb_print.kibot.yaml @@ -19,6 +19,7 @@ outputs: title: Hola sheet: Front sheet_reference_color: "#A02020" + # black_holes: false layers: - layer: Edge.Cuts - layer: F.Cu diff --git a/tests/yaml_samples/report_simple_2.kibot.yaml b/tests/yaml_samples/report_simple_2.kibot.yaml index b0bb2231..56258783 100644 --- a/tests/yaml_samples/report_simple_2.kibot.yaml +++ b/tests/yaml_samples/report_simple_2.kibot.yaml @@ -18,23 +18,31 @@ outputs: - name: 'print_front' comment: "Top copper and silkscreen" - type: svg_pcb_print + type: pcb_print dir: Layers + output_id: -front options: title: 'Fake title for front copper and silk' - layers: - - layer: F.Cu - - layer: F.SilkS + pages: + - scaling: 2.0 + layers: + - layer: F.Cu + - layer: F.SilkS + - layer: Edge.Cuts - name: 'print_bottom' comment: "Bottom copper and silkscreen" - type: svg_pcb_print + type: pcb_print dir: Layers + output_id: -bottom options: title: 'Fake title for bottom copper and silk' - layers: - - layer: B.Cu - - layer: B.SilkS + pages: + - scaling: 2.0 + layers: + - layer: B.Cu + - layer: B.SilkS + - layer: Edge.Cuts - name: 'print_sch_svg' comment: "Schematic"