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Changes in how we compute the drill sizes in the report 

- New global variable `extra_pth_drill` defines how much the drill will
  be enlarged for plated holes.
- Removed all *_1* report values.
- Added *_real* report values. They are the asjusted drill values.
- Now we compute Eurocircuits Drill Class using all the real drill
  sizes.
- Documented all global variables/options.
- Added command line option to list all global options.
- Adjusted the report templates and thei references.

Related to #164
This commit is contained in:
Salvador E. Tropea 2022-04-20 12:57:52 -03:00
parent e00841c921
commit ff41012e84
16 changed files with 143 additions and 41 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

65
README.md
View File

@ -32,6 +32,7 @@
* [Date format option](#date-format-option)
* [PCB details options](#pcb-details-options)
* [Filtering KiBot warnings](#filtering-kibot-warnings)
* [All available global options](#all-available-global-options)
* [Filters and variants](#filters-and-variants)
* [Supported filters](#supported-filters)
* [Examples for filters](#examples-for-filters)
@ -397,6 +398,69 @@ global:
regex: 'FooBar'
```
#### All available global options
global:
* Valid keys:
- `castellated_pads`: [boolean=false] Has the PCB castelletad pads?
KiCad 6: you should set this in the Board Setup -> Board Finish -> Has castellated pads.
- *copper_finish*: Alias for pcb_finish.
- `copper_thickness`: [number|string] Copper thickness in micrometers (1 Oz is 35 micrometers).
KiCad 6: you should set this in the Board Setup -> Physical Stackup.
- `date_format`: [string='%Y-%m-%d'] Format used for the day we started the script.
Is also used for the PCB/SCH date formatting when `time_reformat` is enabled (default behavior).
Uses the `strftime` format.
- `date_time_format`: [string='%Y-%m-%d_%H-%M-%S'] Format used for the PCB and schematic date when using the file timestamp. Uses the `strftime` format.
- `dir`: [string=''] Default pattern for the output directories.
- `edge_connector`: [string='no'] [yes,no,bevelled] Has the PCB edge connectors?
KiCad 6: you should set this in the Board Setup -> Board Finish -> Edge card connectors.
- `edge_plating`: [boolean=false] Has the PCB a plated board edge?
KiCad 6: you should set this in the Board Setup -> Board Finish -> Plated board edge.
- `extra_pth_drill`: [number=0.1] How many millimeters the manufacturer will add to plated holes.
This is because the plating reduces the hole, so you need to use a bigger drill.
For more information consult: https://www.eurocircuits.com/pcb-design-guidelines/drilled-holes/.
- `filters`: [list(dict)] KiBot warnings to be ignored.
* Valid keys:
- `error`: [string=''] Error id we want to exclude. A name for KiCad 6 or a number for KiCad 5, but always a string.
- *error_number*: Alias for number.
- `filter`: [string=''] Name for the filter, for documentation purposes.
- *filter_msg*: Alias for filter.
- `number`: [number=0] Error number we want to exclude. KiCad 5 only.
- `regex`: [string='None'] Regular expression to match the text for the error we want to exclude.
- *regexp*: Alias for regex.
- `impedance_controlled`: [boolean=false] The PCB needs specific dielectric characteristics.
KiCad 6: you should set this in the Board Setup -> Physical Stackup.
- `kiauto_time_out_scale`: [number=0.0] Time-out multiplier for KiAuto operations.
- `kiauto_wait_start`: [number=0] Time to wait for KiCad in KiAuto operations.
- `out_dir`: [string=''] Base output dir, same as command line `--out-dir`.
- `output`: [string=''] Default pattern for output file names.
- `pcb_finish`: [string='HAL'] Finishing used to protect pads. Currently used for documentation and to choose default colors.
KiCad 6: you should set this in the Board Setup -> Board Finish -> Copper Finish option.
Currently known are None, HAL, HASL, HAL SnPb, HAL lead-free, ENIG, ENEPIG, Hard gold, ImAg, Immersion Silver,
Immersion Ag, ImAu, Immersion Gold, Immersion Au, Immersion Tin, Immersion Nickel, OSP and HT_OSP.
- `pcb_material`: [string='FR4'] PCB core material. Currently used for documentation and to choose default colors.
Currently known are FR1 to FR5.
- `silk_screen_color`: [string='white'] Color for the markings. Currently used for documentation and to choose default colors.
KiCad 6: you should set this in the Board Setup -> Physical Stackup.
Currently known are black and white.
- `silk_screen_color_bottom`: [string=''] Color for the bottom silk screen. When not defined `silk_screen_color` is used.
Read `silk_screen_color` help.
- `silk_screen_color_top`: [string=''] Color for the top silk screen. When not defined `silk_screen_color` is used.
Read `silk_screen_color` help.
- `solder_mask_color`: [string='green'] Color for the solder mask. Currently used for documentation and to choose default colors.
KiCad 6: you should set this in the Board Setup -> Physical Stackup.
Currently known are green, black, white, yellow, purple, blue and red.
- `solder_mask_color_bottom`: [string=''] Color for the bottom solder mask. When not defined `solder_mask_color` is used.
Read `solder_mask_color` help.
- `solder_mask_color_top`: [string=''] Color for the top solder mask. When not defined `solder_mask_color` is used.
Read `solder_mask_color` help.
- `time_format`: [string='%H-%M-%S'] Format used for the time we started the script. Uses the `strftime` format.
- `time_reformat`: [boolean=true] Tries to reformat the PCB/SCH date using the `date_format`.
This assumes you let KiCad fill this value and hence the time is in ISO format (YY-MM-DD).
- `units`: [string=''] [millimeters,inches,mils] Default units. Affects `position` and `bom` outputs. Also KiCad 6 dimensions.
- `variant`: [string=''] Default variant to apply to all outputs.
### Filters and variants
The filters and variants are mechanisms used to modify the circuit components.
@ -2732,6 +2796,7 @@ Usage:
kibot [-v...] [-b BOARD] [-e SCHEMA] [-c PLOT_CONFIG] --list
kibot [-v...] [-b BOARD] [-d OUT_DIR] [-p | -P] --example
kibot [-v...] --help-filters
kibot [-v...] --help-global-options
kibot [-v...] --help-list-outputs
kibot [-v...] --help-output=HELP_OUTPUT
kibot [-v...] --help-outputs

6
docs/README.in
View File

@ -32,6 +32,7 @@
* [Date format option](#date-format-option)
* [PCB details options](#pcb-details-options)
* [Filtering KiBot warnings](#filtering-kibot-warnings)
* [All available global options](#all-available-global-options)
* [Filters and variants](#filters-and-variants)
* [Supported filters](#supported-filters)
* [Examples for filters](#examples-for-filters)
@ -309,6 +310,11 @@ global:
regex: 'FooBar'
```
#### All available global options
global:
@global_options@
### Filters and variants
The filters and variants are mechanisms used to modify the circuit components.

2
docs/replace_tags.pl
View File

@ -4,6 +4,7 @@ $outputs =`../src/kibot --help-outputs`;
$cmd_help=`../src/kibot --help`;
$preflight=`../src/kibot --help-preflights`;
$filters=`../src/kibot --help-filters`;
$global_options=`../src/kibot --help-global-options`;
while (<>)
{
@ -11,6 +12,7 @@ while (<>)
$_ =~ s/\@cmd_help\@/$cmd_help/;
$_ =~ s/\@preflight\@/$preflight/;
$_ =~ s/\@filters\@/$filters/;
$_ =~ s/\@global_options\@/$global_options/;
print $_;
}

6
kibot/__main__.py
View File

@ -13,6 +13,7 @@ Usage:
kibot [-v...] [-b BOARD] [-e SCHEMA] [-c PLOT_CONFIG] --list
kibot [-v...] [-b BOARD] [-d OUT_DIR] [-p | -P] --example
kibot [-v...] --help-filters
kibot [-v...] --help-global-options
kibot [-v...] --help-list-outputs
kibot [-v...] --help-output=HELP_OUTPUT
kibot [-v...] --help-outputs
@ -90,7 +91,7 @@ from .misc import (NO_PCB_FILE, NO_SCH_FILE, EXIT_BAD_ARGS, W_VARSCH, W_VARCFG,
W_NOKIVER, hide_stderr)
from .pre_base import (BasePreFlight)
from .config_reader import (CfgYamlReader, print_outputs_help, print_output_help, print_preflights_help, create_example,
print_filters_help)
print_filters_help, print_global_options_help)
from .kiplot import (generate_outputs, load_actions, config_output, generate_makefile)
GS.kibot_version = __version__
@ -355,6 +356,9 @@ def main():
if args.help_filters:
print_filters_help()
sys.exit(0)
if args.help_global_options:
print_global_options_help()
sys.exit(0)
if args.example:
check_board_file(args.board_file)
if args.copy_options and not args.board_file:

4
kibot/config_reader.py
View File

@ -562,6 +562,10 @@ def print_filters_help():
print_output_options(n, o, 2)
def print_global_options_help():
print_output_options('Global options', GS.global_opts_class, 2)
def quoted(val):
if "'" in val:
return '"{}"'.format(val)

4
kibot/globals.py
View File

@ -88,6 +88,10 @@ class Globals(FiltersOptions):
self.impedance_controlled = False
""" The PCB needs specific dielectric characteristics.
KiCad 6: you should set this in the Board Setup -> Physical Stackup """
self.extra_pth_drill = 0.1
""" How many millimeters the manufacturer will add to plated holes.
This is because the plating reduces the hole, so you need to use a bigger drill.
For more information consult: https://www.eurocircuits.com/pcb-design-guidelines/drilled-holes/ """
self.set_doc('filters', " [list(dict)] KiBot warnings to be ignored ")
self._filter_what = 'KiBot warnings'
self._unkown_is_error = True

1
kibot/gs.py
View File

@ -116,6 +116,7 @@ class GS(object):
global_castellated_pads = None
global_edge_plating = None
global_impedance_controlled = None
global_extra_pth_drill = None
test_boolean = True
stackup = None

51
kibot/out_report.py
View File

@ -54,7 +54,7 @@ def get_class_index(val, lst):
return c+1
def get_pattern_class(track, clearance, oar):
def get_pattern_class(track, clearance, oar, case):
""" Returns the Eurocircuits Pattern class for a track width, clearance and OAR """
c1 = (0.25, 0.2, 0.175, 0.150, 0.125, 0.1, 0.09)
c2 = (0.2, 0.15, 0.15, 0.125, 0.125, 0.1, 0.1)
@ -62,15 +62,19 @@ def get_pattern_class(track, clearance, oar):
cc = get_class_index(clearance, c1)
co = get_class_index(oar, c2)
cf = max(ct, max(cc, co))
logger.debug('Eurocircuits Patter class for `{}` is {} because the clearance is {}, track is {} and OAR is {}'.
format(case, cf+3, to_mm(clearance), to_mm(track), to_mm(oar)))
return cf + 3
def get_drill_class(via_drill):
def get_drill_class(via_drill, case):
""" Returns the Eurocircuits Drill class for a drill size.
This is the real (tool) size. """
c3 = (0.6, 0.45, 0.35, 0.25, 0.2)
cd = get_class_index(via_drill, c3)
return chr(ord('A') + cd)
res = chr(ord('A') + cd)
logger.debug('Eurocircuits Drill class for `{}` is {} because the drill is {}'.format(case, res, to_mm(via_drill)))
return res
def to_top_bottom(front, bottom):
@ -429,15 +433,18 @@ class ReportOptions(BaseOptions):
###########################################################
# Drill (min)
###########################################################
extra_pth_drill = GS.global_extra_pth_drill*pcbnew.IU_PER_MM
self.extra_pth_drill = extra_pth_drill
modules = board.GetModules() if GS.ki5() else board.GetFootprints()
self._drills = {}
self._drills_oval = {}
self.oar_pads = self.pad_drill = INF
self.oar_pads = self.pad_drill = self.pad_drill_real = INF
self.slot = INF
self.top_smd = self.top_tht = self.bot_smd = self.bot_tht = 0
top_layer = board.GetLayerID('F.Cu')
bottom_layer = board.GetLayerID('B.Cu')
is_pure_smd, is_not_virtual = self.get_attr_tests()
npth_attrib = 3 if GS.ki5() else pcbnew.PAD_ATTRIB_NPTH
for m in modules:
layer = m.GetLayer()
if layer == top_layer:
@ -457,6 +464,10 @@ class ReportOptions(BaseOptions):
continue
self.pad_drill = min(dr.x, self.pad_drill)
self.pad_drill = min(dr.y, self.pad_drill)
# Compute the drill size to get it after platting
adjust = 0 if pad.GetAttribute() == npth_attrib else extra_pth_drill
self.pad_drill_real = min(dr.x+adjust, self.pad_drill_real)
self.pad_drill_real = min(dr.y+adjust, self.pad_drill_real)
if dr.x == dr.y:
self._drills[dr.x] = self._drills.get(dr.x, 0) + 1
else:
@ -479,26 +490,26 @@ class ReportOptions(BaseOptions):
self.via_pad = self._vias_m[0][1]
self.via_pad_min = min(self.via_pad_d, self.via_pad)
# Via Drill size
self._vias_m = sorted(self._vias.keys())
self.via_drill_d = ds.m_ViasMinDrill if GS.ki5() else ds.m_MinThroughDrill
self.via_drill = self._vias_m[0][0]
self.via_drill_min = min(self.via_drill_d, self.via_drill)
# Via Drill size minus 0.1 mm
self.via_drill_1_d = self.via_drill_d - pcbnew.IU_PER_MM/10
self.via_drill_1 = self.via_drill - pcbnew.IU_PER_MM/10
self.via_drill_1_min = self.via_drill_min - pcbnew.IU_PER_MM/10
# Via Drill size before platting
self.via_drill_real_d = self.via_drill_d+extra_pth_drill
self.via_drill_real = self.via_drill+extra_pth_drill
self.via_drill_real_min = self.via_drill_min+extra_pth_drill
# Pad Drill
# No minimum defined
# No minimum defined (so no _d)
self.pad_drill_min = self.pad_drill if GS.ki5() else ds.m_MinThroughDrill
# Pad Drill size minus 0.1 mm
self.pad_drill_1 = self.pad_drill_1_min = self.pad_drill - pcbnew.IU_PER_MM/10
self.pad_drill_real_min = self.pad_drill_real if GS.ki5() else ds.m_MinThroughDrill+extra_pth_drill
# Drill overall
self.drill_d = min(self.via_drill_d, self.pad_drill)
self.drill = min(self.via_drill, self.pad_drill)
self.drill_min = min(self.via_drill_min, self.pad_drill_min)
# Drill overall size minus 0.1 mm
self.drill_1_d = self.drill_d - pcbnew.IU_PER_MM/10
self.drill_1 = self.drill - pcbnew.IU_PER_MM/10
self.drill_1_min = self.drill_min - pcbnew.IU_PER_MM/10
self.drill_real_d = min(self.via_drill_real_d, self.pad_drill_real)
self.drill_real = min(self.via_drill_real, self.pad_drill_real)
self.drill_real_min = min(self.via_drill_real_min, self.pad_drill_real_min)
self.top_comp_type = to_smd_tht(self.top_smd, self.top_tht)
self.bot_comp_type = to_smd_tht(self.bot_smd, self.bot_tht)
###########################################################
@ -533,13 +544,13 @@ class ReportOptions(BaseOptions):
# https://www.eurocircuits.com/pcb-design-guidelines-classification/
###########################################################
# Pattern class
self.pattern_class_min = get_pattern_class(self.track_min, self.clearance, self.oar_min)
self.pattern_class = get_pattern_class(self.track, self.clearance, self.oar)
self.pattern_class_d = get_pattern_class(self.track_d, self.clearance, self.oar_d)
self.pattern_class_min = get_pattern_class(self.track_min, self.clearance, self.oar_min, 'minimum')
self.pattern_class = get_pattern_class(self.track, self.clearance, self.oar, 'meassured')
self.pattern_class_d = get_pattern_class(self.track_d, self.clearance, self.oar_d, 'defined')
# Drill class
self.drill_class_min = get_drill_class(self.via_drill_min)
self.drill_class = get_drill_class(self.via_drill)
self.drill_class_d = get_drill_class(self.via_drill_d)
self.drill_class_min = get_drill_class(self.drill_real_min, 'minimum')
self.drill_class = get_drill_class(self.drill_real, 'meassured')
self.drill_class_d = get_drill_class(self.drill_real_d, 'defined')
###########################################################
# General stats
###########################################################

7
kibot/report_templates/report_full.txt
View File

@ -52,10 +52,11 @@ Track width: ${track_mm} mm (${track_mils} mils)
- By design rules: ${track_d_mm} mm (${track_d_mils} mils)
Drill: ${drill_mm} mm (${drill_mils} mils)
Drill: ${drill_real_mm} mm (${drill_real_mils} mils)
- Vias: ${via_drill_mm} mm (${via_drill_mils} mils) [Design: ${via_drill_d_mm} mm (${via_drill_d_mils} mils)]
- Pads: ${pad_drill_mm} mm (${pad_drill_mils} mils)
- Vias: ${via_drill_real_mm} mm (${via_drill_real_mils} mils) [Design: ${via_drill_real_d_mm} mm (${via_drill_real_d_mils} mils)]
- Pads: ${pad_drill_real_mm} mm (${pad_drill_real_mils} mils)
- The above values are real drill sizes, they add ${extra_pth_drill_mm} mm (${extra_pth_drill_mils} mils) to plated holes (PTH)
Via: ${via_pad_mm}/${via_drill_mm} mm (${via_pad_mils}/${via_drill_mils} mils)

2
kibot/report_templates/report_simple.txt
View File

@ -9,7 +9,7 @@ Track width: ≥ ${track_mm} mm
Insulation distance: ≥ ${clearance_mm} mm
Minimum drill size: ≥ ${drill_mm} mm (finished metalized hole: ${drill_1_mm} mm)
Minimum drill size: ≥ ${drill_real_mm} mm (finished metalized hole: ${drill_mm} mm)
Minimum slot width: ≥ ${slot_mm} mm

1
tests/board_samples/kicad_5/.gitignore vendored
View File

@ -2,3 +2,4 @@ bom/
print_err.pro
test_v5/
zone-refill.pro
light_control.pro

9
tests/reference/5_1_6/light_control-report.txt
View File

@ -26,10 +26,11 @@ Track width: 0.15 mm (6 mils)
- By design rules: 0.13 mm (5 mils)
Drill: 0.25 mm (10 mils)
Drill: 0.35 mm (14 mils)
- Vias: 0.25 mm (10 mils) [Design: 0.2 mm (8 mils)]
- Pads: 0.6 mm (24 mils)
- Vias: 0.35 mm (14 mils) [Design: 0.3 mm (12 mils)]
- Pads: 0.7 mm (28 mils)
- The above values are real drill sizes, they add 0.1 mm (4 mils) to plated holes (PTH)
Via: 0.51/0.25 mm (20/10 mils)
@ -41,7 +42,7 @@ Outer Annular Ring: 0.25 mm (10 mils)
- By design rules: 0.25 mm (10 mils)
Eurocircuits class: 6D
Eurocircuits class: 6C
# General stats

9
tests/reference/5_1_6/light_control-report.txt_2
View File

@ -26,10 +26,11 @@ Track width: 0.15 mm (6 mils)
- By design rules: 0.13 mm (5 mils)
Drill: 0.25 mm (10 mils)
Drill: 0.35 mm (14 mils)
- Vias: 0.25 mm (10 mils) [Design: 0.2 mm (8 mils)]
- Pads: 0.6 mm (24 mils)
- Vias: 0.35 mm (14 mils) [Design: 0.3 mm (12 mils)]
- Pads: 0.7 mm (28 mils)
- The above values are real drill sizes, they add 0.1 mm (4 mils) to plated holes (PTH)
Via: 0.51/0.25 mm (20/10 mils)
@ -41,7 +42,7 @@ Outer Annular Ring: 0.25 mm (10 mils)
- By design rules: 0.25 mm (10 mils)
Eurocircuits class: 6D
Eurocircuits class: 6C
# General stats

4
tests/reference/5_1_6/light_control-report_simple.txt
View File

@ -3,13 +3,13 @@ Size:
- 59.69x48.26 mm
Class: 6D
Class: 6C
Track width: ≥ 0.15 mm
Insulation distance: ≥ 0.15 mm
Minimum drill size: ≥ 0.25 mm (finished metalized hole: 0.15 mm)
Minimum drill size: ≥ 0.35 mm (finished metalized hole: 0.25 mm)
Minimum slot width: ≥ 0.6 mm

9
tests/reference/6_0_4/light_control-report.txt
View File

@ -51,10 +51,11 @@ Track width: 0.15 mm (6 mils)
- By design rules: 0.13 mm (5 mils)
Drill: 0.25 mm (10 mils)
Drill: 0.35 mm (14 mils)
- Vias: 0.25 mm (10 mils) [Design: 0.2 mm (8 mils)]
- Pads: 0.6 mm (24 mils)
- Vias: 0.35 mm (14 mils) [Design: 0.3 mm (12 mils)]
- Pads: 0.7 mm (28 mils)
- The above values are real drill sizes, they add 0.1 mm (4 mils) to plated holes (PTH)
Via: 0.51/0.25 mm (20/10 mils)
@ -66,7 +67,7 @@ Outer Annular Ring: 0.25 mm (10 mils)
- By design rules: 0.25 mm (10 mils)
Eurocircuits class: 6D
Eurocircuits class: 6C
# General stats

4
tests/reference/6_0_4/light_control-report_simple.txt
View File

@ -3,13 +3,13 @@ Size:
- 59.69x48.26 mm
Class: 6D
Class: 6C
Track width: ≥ 0.15 mm
Insulation distance: ≥ 0.15 mm
Minimum drill size: ≥ 0.25 mm (finished metalized hole: 0.15 mm)
Minimum drill size: ≥ 0.35 mm (finished metalized hole: 0.25 mm)
Minimum slot width: ≥ 0.6 mm