Commit Graph

67 Commits

Author SHA1 Message Date
Salvador E. Tropea ec35d2443f Added option to copy plot options from the PCB to the YAML example.
Also added DXF.metric_units and updated the README.
2020-07-01 20:43:03 -03:00
Salvador E. Tropea d926a5419e Added --example basic tests
Also added support for output directory to --example
2020-06-30 20:43:42 -03:00
Salvador E. Tropea 3c6f4950c7 Now the schematic can be specified separately.
We now test if the PCB and/or SCH are there only when we need them.
2020-06-29 19:25:54 -03:00
Salvador E. Tropea 42d1f14056 Now layers are solved when we really need it.
So we can do some operations (like --list) without loading the board.
Also: now the names for the layers are asked to pcbnew classes (not from file)
2020-06-29 12:55:02 -03:00
Salvador E. Tropea d48f258c33 Added tests for the various help options. 2020-06-26 14:48:40 -03:00
Salvador E. Tropea 2f0f3f755d Changed the command line parser from argparse to docopt.
This make the code cleaner and better documented.
Now the usage is more clear, and also a little bit more strict.
I'm using a modified docopt because I preffer using args.option instead of
args['--option'], I also fixed a few flake8 issues in docopt.py.
2020-06-26 12:04:56 -03:00
Salvador E. Tropea 6ed99d8515 Tests adapted to the new error message strings. 2020-06-19 16:00:16 -03:00
Salvador E. Tropea c2a735e9a6 For some reason Python sys.path vector has a limit and I was abusing it.
Each test module setups the path to find the needed modules, but didn't check
if it was necesary. Creating a long path that finally started to fail.
2020-06-15 15:14:53 -03:00
Salvador E. Tropea 7b8aa57610 Added missing blank line and removed extra blank line at the end. 2020-05-26 14:01:11 -03:00
Salvador E. Tropea 21bc1f939e Added test for missing PCB file in command line 2020-05-26 12:23:43 -03:00
Salvador E. Tropea b429a81473 Added test for --list option 2020-05-26 12:12:18 -03:00
Salvador E. Tropea 92de025c96 Added test for wrong config file name 2020-05-26 12:05:35 -03:00
Salvador E. Tropea c41faba302 Added tests for guessing the board and YAML, also missing YAML 2020-05-26 12:02:16 -03:00
Salvador E. Tropea b5448739ee Added a test for missing PCB file 2020-05-25 20:28:35 -03:00
Salvador E. Tropea 0ed23a1642 Added a test to skip one output 2020-05-25 20:12:42 -03:00
Salvador E. Tropea cc4d942111 Added a test for a bogus output type. 2020-05-25 20:00:59 -03:00
Salvador E. Tropea 5a23fe2b37 Added tests for various cases of --skip command line option. 2020-05-25 19:49:05 -03:00