70 lines
1.8 KiB
YAML
70 lines
1.8 KiB
YAML
# Gerber and drill files for PCBWay, with stencil (solder paste)
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# URL: https://www.pcbway.com
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# Based on setting used by Gerber Zipper (https://github.com/g200kg/kicad-gerberzipper)
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kibot:
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version: 1
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outputs:
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- name: PCBWay_gerbers
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comment: Gerbers compatible with PCBWay
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type: gerber
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dir: PCBWay
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options: &gerber_options
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exclude_edge_layer: true
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exclude_pads_from_silkscreen: true
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plot_sheet_reference: false
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plot_footprint_refs: true
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plot_footprint_values: true
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force_plot_invisible_refs_vals: false
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tent_vias: true
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use_protel_extensions: true
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create_gerber_job_file: false
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output: "%f.%x"
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gerber_precision: 4.6
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use_gerber_x2_attributes: false
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use_gerber_net_attributes: false
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disable_aperture_macros: true
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line_width: 0.1
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subtract_mask_from_silk: false
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inner_extension_pattern: '.gl%N'
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layers:
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- copper
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- F.SilkS
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- B.SilkS
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- F.Mask
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- B.Mask
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- F.Paste
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- B.Paste
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- Edge.Cuts
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- name: PCBWay_drill
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comment: Drill files compatible with PCBWay
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type: excellon
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dir: PCBWay
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options:
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metric_units: false
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minimal_header: true
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zeros_format: SUPPRESS_LEADING
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# left_digits: 3
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# right_digits: 3
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# See https://github.com/INTI-CMNB/kicad-ci-test-spora/issues/1
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# and https://docs.oshpark.com/design-tools/gerbv/fix-drill-format/
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left_digits: 2
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right_digits: 4
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pth_and_npth_single_file: false
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pth_id: ''
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npth_id: '-NPTH'
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output: "%f%i.drl"
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- name: PCBWay
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comment: ZIP file for PCBWay
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type: compress
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dir: PCBWay
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options:
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format: ZIP
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files:
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- from_output: PCBWay_gerbers
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dest: /
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- from_output: PCBWay_drill
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dest: /
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