125 lines
3.4 KiB
Plaintext
125 lines
3.4 KiB
Plaintext
# PCB
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Board size: ${bb_w_mm}x${bb_h_mm} mm (${bb_w_in}x${bb_h_in} inches)
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- This is the size of the rectangle that contains the board
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- Thickness: ${thickness_mm} mm (${thickness_mils} mils)
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- Material: ${pcb_material}
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- Finish: ${pcb_finish}
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- Layers: ${layers}
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- Copper thickness: ${copper_thickness} µm
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Solder mask: ${solder_mask}
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- Color: ${solder_mask_color_text}
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Silk screen: ${silk_screen}
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- Color: ${silk_screen_color_text}
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#?edge_connector or castellated_pads or edge_plating
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Special features:
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#?edge_connector or castellated_pads or edge_plating
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#?edge_connector
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- Edge connector: ${edge_connector}
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#?castellated_pads
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- Castellated pads
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#?edge_plating
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- Edge plating
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#?stackup
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Stackup:
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#?stackup and impedance_controlled
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#?stackup and impedance_controlled
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Impedance controlled: YES
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#?stackup
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#?stackup
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| Name | Type | Color | Thickness | Material | Epsilon_r | Loss tangent |
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#?stackup
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|----------------------|----------------------|----------|-----------|-----------------|-----------|--------------|
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#?stackup
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#stackup:| ${%-20s,name} | ${%-20s,type} | ${%-8s,color} | ${%9d,thickness} | ${%-15s,material} | ${%9.1f,epsilon_r} | ${%12.2f,loss_tangent} |
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#?stackup
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# Important sizes
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Clearance: ${clearance_mm} mm (${clearance_mils} mils)
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Track width: ${track_mm} mm (${track_mils} mils)
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- By design rules: ${track_d_mm} mm (${track_d_mils} mils)
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Drill: ${drill_real_mm} mm (${drill_real_mils} mils)
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- Vias: ${via_drill_real_mm} mm (${via_drill_real_mils} mils) [Design: ${via_drill_real_d_mm} mm (${via_drill_real_d_mils} mils)]
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- Pads: ${pad_drill_real_mm} mm (${pad_drill_real_mils} mils)
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- The above values are real drill sizes, they add ${extra_pth_drill_mm} mm (${extra_pth_drill_mils} mils) to plated holes (PTH)
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Via: ${via_pad_mm}/${via_drill_mm} mm (${via_pad_mils}/${via_drill_mils} mils)
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- By design rules: ${via_pad_d_mm}/${via_drill_d_mm} mm (${via_pad_d_mils}/${via_drill_d_mils} mils)
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- Micro via: ${micro_vias} [${uvia_pad_mm}/${uvia_drill_mm} mm (${uvia_pad_mils}/${uvia_drill_mils} mils)]
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- Burried/blind via: ${blind_vias}
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Outer Annular Ring: ${oar_mm} mm (${oar_mils} mils)
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- By design rules: ${oar_d_mm} mm (${oar_d_mils} mils)
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Eurocircuits class: ${pattern_class}${drill_class}
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- Using min drill ${drill_real_ec_mm} mm for an OAR of ${oar_ec_mm} mm
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# General stats
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Components count: (SMD/THT)
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- Top: ${top_smd}/${top_tht} (${top_comp_type})
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- Bottom: ${bot_smd}/${bot_tht} (${bot_comp_type})
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Defined tracks:
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#defined_tracks:- ${track_mm} mm (${track_mils} mils)
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Used tracks:
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#used_tracks:- ${track_mm} mm (${track_mils} mils) (${count}) defined: ${defined}
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Defined vias:
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#defined_vias:- ${pad_mm}/${drill_mm} mm (${pad_mils}/${drill_mils} mils)
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Used vias:
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#used_vias:- ${pad_mm}/${drill_mm} mm (${pad_mils}/${drill_mils} mils) (Count: ${count}, Aspect: ${aspect} ${producibility_level}) defined: ${defined}
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Holes (excluding vias):
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#hole_sizes_no_vias:- ${drill_mm} mm (${drill_mils} mils) (${count})
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Oval holes:
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#oval_hole_sizes:- ${drill_1_mm}x${drill_2_mm} mm (${drill_1_mils}x${drill_2_mils} mils) (${count})
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Drill tools (including vias and computing adjusts and rounding):
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#drill_tools:- ${drill_mm} mm (${drill_mils} mils) (${count})
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#?schematic_svgs
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# Schematic
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#?schematic_svgs
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#?schematic_svgs
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#schematic_svgs:{ width=16.5cm height=11.7cm }${new_line}
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#?layer_svgs
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# PCB Layers
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#?layer_svgs
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#?layer_svgs
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#layer_svgs:{ width=16.5cm height=11.7cm }${new_line}
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